SaTC: STARSS: Small: Design of Low-Power True Random Number Generator based on Adaptive Post-Processing

几乎所有的安全协议都依赖于随机数。硬件真随机数生成器(TRNG)是在集成电路(IC)内实现的电路。如果TRNG不是真正随机的，则对手可能能够侵入协议的安全性。因此，真正的随机性是一个重要的性质。TRNG电路通常很大，而且耗电。在电池供电的设备或能源受限的环境中需要低功率的TRNG。这项建议满足了这一需求。这项拟议的研究探索了传统TRNG设计的替代方案。它不是通过直接翻转电路来生成高质量随机数来承担相当大的设计复杂性和能量消耗，而是从足够好的物理电路随机数生成器开始，然后将其与强大的低功耗统计后处理单元相结合，以解决TRNG输出之间的偏差和相关性。这导致了这样一种设计，其中第一分量只需要提供一些随机性，而第二分量通过去相关和去偏移来精炼这种随机性，以提取类似于相同和独立的公平掷硬币的可证明的完全随机的比特序列。这一设计将在硅原型中实现。建议的研究是跨学科的，涉及应用概率、网络安全和VLSI设计。

Nearly all security protocols rely on random numbers. A hardware True Random Number Generator (TRNG) is a circuit implemented within an Integrated Circuit (IC). If a TRNG is not truly random, an adversary may be able to break into the security of a protocol. Hence true randomness is an important property. TRNG circuits are often large and power hungry. There is a need for low-power TRNG in battery operated devices or in energy constrained environments. This proposal addresses that need. The proposed research explores an alternative to traditional TRNG designs. Instead of taking on considerable design complexity and energy dissipation by directly turning circuits to generate high quality random numbers, it starts with a sufficiently good physical circuit random number generator, and then combines it with a robust low-power statistical post-processing unit to address both bias, and correlation between TRNG outputs. This results in a design where the first component is only required to provide some randomness, while the second component refines this randomness through decorrelation and bias removal to extract provably perfectly random sequence of bits akin to identical and independent fair coin flips. This design will be implemented in a silicon prototype. The proposed research is interdisciplinary involving applied probability, network security, and VLSI design.