FoMR: Heterogeneity Under-The-Hood: Leveraging the Decoder for Highly Specialized, Programmer Transparent Microarchitectures

在不增加能耗的情况下扩展计算能力的需求一如既往地高。一刀切的计算模型在平均情况下表现良好，但在许多个别应用程序的性能和能源效率方面存在问题。定制在未来的处理器设计中扮演着至关重要的角色。然而，传统编程和执行模式之外的定制尚未兑现其承诺。该项目提供了具有多种功能的硬件/软件接口，在不打破传统编程和执行模式的情况下，实现了对异种硬件的无缝采用。这项工作使微体系结构内的专门化达到了新的水平，而不会中断传统的通用编程接口。研究团队将继续增加和支持其部门内的员工多样性，继续并扩大最近引入的一系列新举措。该项目探索新颖、非侵入性和程序员透明的编译器、运行时和解码器技术，这些技术将解锁几个以前未探索过的硬件设计，不仅为多线程工作负载提供更高的吞吐量和效率，而且显著提高现有的单线程性能水平。这项工作介绍了两种新的体系结构：(1)复合-ISA(指令集体系结构)异构性多核，它可以使用从大型超集x86-like ISA派生的单个复合-ISA来匹配多ISA异构性的收益；(2)上下文敏感解码，它利用现代解码器的内部微操作翻译功能来无缝地改变和定制执行以适应不断变化的环境条件，而不需要重新编译或二进制翻译，并且没有显著的性能开销。这一级别的定制在应对Meltdown和Spectre漏洞等新的恶意软件威胁时特别有用，否则可能需要完全重新设计硬件和/或由于基于软件/操作系统的机制而导致令人望而却步的高性能成本。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The need to scale computation capabilities without scaling up energy consumption is as high as ever. The one-size-fits-all computation model performs well on an average case but suffers in performance and energy efficiency for many individual applications. Customization plays a crucial role in processor design going forward. However, customization outside traditional programming and execution models has not yet fulfilled its promise. This project provides the hardware/software interface with diverse capabilities to enable the seamless adoption of heterogeneous hardware, without breaking traditional programming and execution models. This work enables new levels of specialization within the microarchitecture without disrupting the traditional general-purpose programming interface. The research team will continue increase and support workforce diversity within their department, continuing and broadening a new set of initiatives recently introduced.This project explores novel, non-intrusive, and programmer-transparent compiler, runtime, and decoder techniques that will unlock several previously unexplored hardware designs that not only offer greater throughput and efficiency for multithreaded workloads, but substantially improve existing levels of single thread performance. This work introduces two novel architectures: (1) Composite-ISA (Instruction Set Architecture) Heterogeneous Multicores that can match the gains of multi-ISA heterogeneity using a single composite-ISA derived from a large superset x86-like ISA, and (2) Context-Sensitive Decoding that leverages the internal micro-op translation feature of the modern decoders to seamlessly morph and tailor execution to changing environmental conditions, without recompilation or binary translation, and at no significant performance overhead. This level of customization is especially useful in responding to new malware threats such as the Meltdown and Spectre vulnerabilities, which could otherwise require complete hardware redesign and/or incur prohibitively high performance costs due to software/OS-based mechanisms.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.