Collaborative Research: Two-dimensional Synaptic Array for Advanced Hardware Acceleration of Deep Neural Networks

非技术性：大数据革命催生了对新计算模式的迫切需求，以便高效地从大数据集中提取有价值的信息。在现有的计算系统中，数据在计算单元和存储单元之间不断地传输。这种所谓的内存瓶颈限制了它们的能效和速度。相比之下，人类大脑中的计算和记忆(神经元和突触)是紧密相连的。这使得大脑在~20W的功率消耗极低。在大脑的启发下，神经形态计算和人工神经网络最近吸引了巨大的兴趣。特别是，深度神经网络(DNN)可以执行复杂的处理任务，如模式识别和图像重建。然而，DNN是计算密集型和耗电量大的。这使得将它们扩展到真正的人工智能(AI)的复杂程度是不切实际的。在这个项目中，该团队将开发一种用于深度神经网络的新型人工突触。这种典型的Synapse将提供低功耗、高精度、良好的可扩展性和巨大的大规模集成潜力。这项工作可以显著提高深度学习算法的能量效率、带宽和性能。这一研究成果可以导致人工智能在高性能计算和低功耗灵活电子产品中的广泛使用。该项目可以通过医疗保健、自动驾驶汽车和自动制造方面的进步来彻底改变社会。该团队将与当地社区密切合作，吸引学生从事工程职业，特别是来自代表性不足群体的学生。活动将包括实验室演示、设计项目、暑期实习和职业工作坊。技术：该项目的目标是开发可扩展的高精度和低功耗的电化学二维(2D)突触阵列，用于深度神经网络(DNN)的高级硬件加速，能量和速度都有数量级的提高。虽然二进制SRAM单元在DNN硬件加速方面表现出了良好的性能，但其在功率和面积方面的固有限制使得将其扩展到大规模问题和/或数据集所需的复杂性水平是不切实际的。在这个项目中，该团队将采取整体的方法来开发可扩展的电化学2D突触阵列，具有高精度、低功耗、良好的线性度、低变化性和与大规模集成的CMOS兼容性。该团队将执行以下三项研究任务：(1)在设备精度、动态范围和缩放方面的设备级优化；(2)通过构建突触阵列、降低设备变量和设计外围电路进行阵列级演示；(3)通过构建设备模型、实施内存中计算(CIM)和演示像素到像素应用的片上学习来实现系统级集成。这项工作将为DNN的硬件加速提供一个低功耗和可扩展的框架，为人工智能(AI)在高性能计算机和低功耗嵌入式系统中的普遍使用铺平道路。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Nontechnical:The big data revolution has created a critical need for new computing paradigms to efficiently extract valuable information from large datasets. In existing computing systems, data is constantly transferred between the computation and memory units. This so-called memory bottleneck limits their energy efficiency and speed. In contrast, computation and memory in the human brain (neurons and synapses) are closely and densely interconnected. This gives rise to the brain’s extremely low power consumption at ~20W. Inspired by the brain, neuromorphic computing and artificial neural networks have recently attracted immense interest. In particular, deep neural networks (DNNs) can execute complex processing tasks such as pattern recognition and image reconstruction. However, DNNs are computationally intensive and power hungry. This makes it impractical for them to be scaled up to the level of the complexity for true artificial intelligence (AI). In this project, the team will develop a novel artificial synapse for deep neural networks. This prototypical synapse will offer low power consumption, high precision, good scalability, and great potential for large-scale integration. This work can lead to significant improvement in energy efficiency, bandwidth, and performance for deep learning algorithms. The research outcome can lead to the wide use of AI for both high-performance computing and low-power flexible electronics. This project can revolutionize society through advances in healthcare, self-driving vehicles, and autonomous manufacturing. The team will work closely with their local communities to attract students to pursue engineering careers, especially those from underrepresented groups. Activities will include laboratory demonstrations, design projects, summer internships, and career workshops.Technical:The objective of this project is to develop scalable electrochemical two-dimensional (2D) synaptic arrays with high-precision and low-power for advanced hardware acceleration of deep neural networks (DNNs) with orders of magnitude improvements in energy and speed. While binary SRAM cells have shown promising performance for DNN hardware acceleration, its inherent limitations in power and area make it impractical to scale up to the complexity level required for large-scale problems and/or datasets. In this project, the team will take a holistic approach to develop scalable electrochemical 2D synaptic arrays with high precision, lower-power, good linearity, low variations, and CMOS compatibility for large-scale integration. The team will carry out the following three research tasks: (1) device-level optimization in device precision, dynamic range, and scaling; (2) array-level demonstration by building synaptic arrays, lowering device variations, and designing peripheral circuits; (3) system-level integration via building device models, implementing computing-in-memory (CIM), and demonstrating on-chip learning for pixel-to-pixel applications. This work will provide a low-power and scalable framework for the hardware acceleration of DNNs, paving the ways towards the ubiquitous use of artificial intelligence (AI) in both high-performance computers and low-power embedded systems.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.