Investigation of Behaviours of Electrons in Ultra-thin Amorphous Silicon Layer and their Device Applications

这项工作首次指出了超薄有源层在非晶硅晶体管中的技术重要性。这是因为，通过减小厚度，(1)减小了截面，(2)减小了光学长度，(3)增强了界面处的复合，(4)增大了光学带隙。它们导致在照明条件下减少泄漏电流。考虑到实际的逻辑化状态密度分布，进行了理论分析。结果表明，当厚度小于10nm时，晶体管的工作电流开始增大。采用传统的等离子体CVD方法制备了超薄a-Si晶体管，并对其性能进行了评价。当厚度大于20nm时，理论结果与实验结果吻合较好。然而，通过进一步稀释有源层，工作电流迅速降低。造成这种差异的原因是超薄a-Si层生长不均匀。为了获得均匀超薄的a- si层，我们提出了一种新的沉积方法，称为“两步”沉积法，即在沉积的第一步形成致密的a- si核，然后在最佳沉积条件下沉积具有良好电性能的活性a- si层。利用该方法实现了14nm厚晶体管的大工作电流操作，甚至成功操作了5nm厚晶体管。接下来，为了克服背面表面带来的问题，我们开发了一种新的表面处理方法，称为“低温热氧化”法。结合这些结果，开发了新型自对准晶体管。我们还证明了超薄有源层对电荷耦合器件也是有效的。

This work has pointed out, for the first time, the technologcal importance of the ultra-thin active layer in amorphous-silicon transistors. This is because, by reducing the thickness, (1) cross section is reduced, (2) optical length is reduced, (3) recombination at the interface is enhanced and (4) optical band gap is enlarged. They result in the reduction of leakage current under illuminated conditions. Theoretical analysis has been carried out by taking the realistic logalized state density distribution into account. It was shown that when the thickness becomes less than 10nm, operating current of the transistor begins to increase.By using conventional plasma CVD method, ultra-thin a-Si transistors have been fabricated and their performance has been evaluated. It became clear that theoretical results agree well with experimental results when the thickness is more than 20nm. However, the operating current is reduced rapidly by further thinning the active layer.Origin of this discrepancy has been attributed to the non-uniform growth of the ultra-thin a-Si layer. To obtain uniform and ultra-thin a-Si layer, we have proposed a novel deposition method named as "two-step" deposition method, where dense a-Si nuclei is formed at the first stage of deposition and then the active a-Si layer of good electrical properties is deposited under the optimum deposition condition. By using this method, the 14nm thick transistor has been operated with large operating current and even 5nm thick transistor has been successfully operated.Next, for the purpose of overcoming the problem caused by the back-side surface, we have developed a new surface treatment method named as "low-temperature thermal oxidation" method. By combining these results, novel self-alignment transistors have been developed. And we have also shown that the ultra-thin active layer is also effective to charge-coupled devices.