Band-Splitting Receiver Approaches for Wireless 6G Data-Communications up to 160 Gb/s (B A U D O T)

通过利用当今可用的大RF带宽，无线RF前端的数据速率已达到创纪录的120 Gb/s。然而，一个关键的挑战尚未解决。这些超高速无线通信前端不包括系统板上的数字基带处理和模数转换器（ADC）。对于最快的系统，数字处理功能和模数转换是由昂贵、笨重、耗电的实验室测量设备完成的。因此，对于超过100 Gb/s的无线通信，目前没有完全的板上集成和紧凑的解决方案。为了解决这个问题，我们希望在BAUDOT中研究基于智能管理程序的链路虚拟化的新型接收器方法，该方法允许将几个低速基带模块聚合，这些模块又映射到频带分离混频器阵列上。这种方法可以与天线和基带域中的进一步频带分离和复用器技术相结合。因此，关键的基带和ADC模块以低得多的速度工作，从而降低了总体能耗。为了使用高增益天线实现大带宽，我们的目标频段为200 GHz左右。一个示例实现将基于两个20 GHz天线路径，每个20 GHz天线路径被混频器阵列分成四个5 GHz的IQ路径。因此，采用16-QAM（正交幅度调制）时，2 × 20 GHz × 4 bit/s/Hz = 160 Gb/s的创纪录总体接收机数据速率是可行的，同时仅需要具有4-5位中等分辨率和仅5 GHz相对较低带宽的基带和ADC模块。后者大大简化了数字处理、封装和系统集成。管理程序将负责链路虚拟化，即将超快比特流分成几个较低速度的流。模块化允许通过路径模块的性能感知切换的可扩展方法和功率高效实现。我们的目标是视线通信距离高达5米，使用4 × 4天线阵列，增益约为17 dBi。这些介质谐振器天线阵列是通过在硅中进行背面蚀刻以集成在芯片上来实现的。我们的目标是在IHP的超节能BiCMOS技术中设计RF前端，其记录fmax（最大振荡频率）高达610 GHz。BAUDOT结合了Frank Ellinger在毫米波IC设计领域和Rolf Kraemer在高速基带、数据链路控制、天线和通信系统方面的多学科能力。

Record data rates up to 120 Gb/s have been demonstrated for wireless RF-frontends by exploiting the large RF bandwidths available today. However, one key challenge is not solved yet. These ultra-fast wireless communication frontends do not include the digital baseband processing and analogue to digital converters (ADCs) on the system board. For the fastest systems, the digital processing functions and analogue to digital conversion are done by expensive, bulky, heavy and power-hungry lab measurement equipment. Hence, no full on board integration and no compact solutions are available today for wireless communications beyond 100 Gb/s. To solve this problem, we want to investigate in BAUDOT novel receiver approaches based on link virtualization by a smart hypervisors allowing the aggregation of several lower speed baseband modules that are in turn mapped onto band-splitting mixer-arrays. This approach can be combined with further band-splitting and multiplexer techniques in the antenna and baseband domains. Hence, the critical baseband and ADC modules operate at much lower speeds thereby reducing the overall energy consumption. To enable large bandwidths with high gain antennas, we target frequency bands around 200 GHz. One example implementation will be based on two 20 GHz antenna paths each split by the mixer array into four IQ paths a 5 GHz. Hence, a record overall receiver data rate of 2 × 20 GHz × 4 bit/s/Hz = 160 Gb/s is feasible with 16-QAM (quadrature amplitude modulation) while solely requiring baseband and ADC modules with moderate resolutions of 4-5 bits and relatively low bandwidth of only 5 GHz. The latter massively simplifies digital processing, packaging and system integration. The hypervisor will take care of the link virtualization i.e. the splitting of ultra-fast bit streams into several lower speed streams. The modularity allows a scalable approach and a power efficient implementation by performance-aware switching of the path modules. We target line of sight communication distances up to 5 m by using 4 × 4 antenna arrays with gain of around 17 dBi. These dielectric resonator antenna arrays are realized by back-side etching in silicon for integration on the chip. We aim at designing the RF-frontend in ultra-energy-efficient BiCMOS technology of IHP with record fmax (maximum frequency of oscillation) of up to 610 GHz. BAUDOT combines the multidisciplinary competences of Frank Ellinger in the area of millimetre-wave IC design and Rolf Kraemer regarding high-speed baseband, data link control, antennas and communication systems.