A Psychologically-Inspired VLSI Brain Model System Implementing Subconscious Information Processing Based on Analog/Digital Marged Computation

本研究的目的是开发一个类似人类的灵活识别系统，而不是通过复杂的软件处理，而是通过开发最有效地模仿“人类心理处理”的VLSI硬件，该系统的核心是联想处理器，它自主地回忆过去经验中的最大似然事件到当前输入。我们已经开发了一种联想处理器，其中在铁电薄膜中的极化被用作系统中的存储介质。为了解决薄膜中的去极化和由此产生的存储内容退化的问题，引入了新开发的“异质栅铁电浮栅MOS”器件来构建关联电路。铁电薄膜特性在这种应用中的实验研究已被广泛进行，它表明，该系统是最适合于这样的应用，如移动的系统，其中功耗是严格限制。ADP匹配VLSI ...更多信息 芯片已开发的情节记忆回忆。在情节存储器中，存储事件的时间序列，并且需要搜索最相似的序列，从而允许一些丢失的事件或插入一些额外的事件。这是一个非常昂贵的计算处理。然而，一个非常低的功耗和高速DP匹配的VLSI已经开发出基于延迟编码逻辑电路。该系统在时域处理模拟信号，在电压域处理数字信号，实现了快速、低功耗的工作。作为算法开发的测试平台，开发了人脸定位与验证系统。利用从图像中提取的基于边缘信息的图像特征向量，在不同的光照、散焦、缩放和旋转条件下，从各种场景中非常鲁棒地检测出人脸。由于边缘滤波是计算上非常昂贵的处理，因此已经开发了专用于该处理的各种VLSI芯片，并且已经实现了实时响应能力。通过仅在100MHz下操作图像矢量生成VLSI，它比在具有2GHz CPU的PC上运行的软件处理性能高出约10，000倍。少

The purpose of this research is to develop a human-like flexible recognition system not by a sophisticated software processing but by developing VLSI hardware most efficiently mimicking the "human mind-processing".The core of the system is the associative processor that autonomously recalls the maximum likelihood event in the past experience to a current input. We have developed an associative processor where the polarization in a ferroelectric film is utilized as the memory media in the system. In order to resolve the problem of depolarization in the film and the resultant degraded memory contents, a newly developed "Hetero-Gate Ferroelectric Floating Gate MOS" device was introduced to build associative circuitries. Experimental investigation on the ferroelectric film characteristics in such applications has been extensively conducted and it was shown that the system is most suited to such applications as mobile systems in which power dissipation is severely limited. ADP matching VLSI … More chip has been developed for episode memory recall. In episode memory, time sequences of events are stored and the most similar sequence needs be searched allowing some missing events or insertion of some extra events. This is a very computationally expensive processing. However, a very low-power and high-speed DP matching VLSI has been developed based on delay-encoding logic circuits. The system deals analog signals in the time domain while digital signals are utilized in the voltage domain, resulting in the fast and low power operation.As a test vehicle of algorithm development, a face localization and verification system has been developed. Using the image feature vectors based on the edge information extracted from images, faces are very robustly detected from various scenes under different illumination, defocusing, scaling and rotation conditions. Since edge filtering is a very computationally expensive processing, various VLSI chips specialized for the processing have been developed and real-time response capability has been achieved. By operating the image vector generation VLSI at only 100MHz, it outperforms the software processing running on a PC having 2GHz CPU by a factor of approximately 10,000. Less