A Psychologically-Inspired VLSI Brain Model System Implementing Subconscious Information Processing Based on Analog/Digital Marged Computation

本研究的目的不是通过复杂的软件处理，而是通过开发最有效地模仿“人类思维处理”的超大规模集成电路硬件来开发类似人类的柔性识别系统。该系统的核心是联想处理器，它可以自主地将过去经验中的最大可能性事件召回到当前输入。我们开发了一种联合处理器，利用铁电薄膜中的极化作为系统中的存储介质。为了解决薄膜的去极化问题和由此导致的存储容量下降的问题，引入了一种新开发的“异质门铁电浮栅MOS”器件来构建联想电路。对这些应用中的铁电薄膜特性进行了广泛的实验研究，结果表明该系统最适合于功耗受到严重限制的移动系统等应用。ADP与VLSI相匹配，开发了集记忆检索芯片。在情节记忆中，事件的时间序列被存储，需要搜索最相似的序列，允许一些缺失的事件或插入一些额外的事件。这是一个非常昂贵的计算过程。然而，基于延迟编码逻辑电路的极低功耗和高速DP匹配VLSI已经被开发出来。该系统在时域处理模拟信号，在电压域处理数字信号，从而实现了快速、低功耗的工作。作为算法开发的测试载体，开发了人脸定位与验证系统。利用基于图像边缘信息提取的图像特征向量，在不同光照、散焦、缩放和旋转条件下对不同场景的人脸进行了鲁棒检测。由于边缘滤波是一个非常昂贵的计算处理，各种专门用于处理的VLSI芯片已经开发出来，并且已经实现了实时响应能力。通过仅以100MHz的频率操作图像矢量生成VLSI，它比在具有2GHz CPU的PC上运行的软件处理性能高出约10,000倍。少

The purpose of this research is to develop a human-like flexible recognition system not by a sophisticated software processing but by developing VLSI hardware most efficiently mimicking the "human mind-processing".The core of the system is the associative processor that autonomously recalls the maximum likelihood event in the past experience to a current input. We have developed an associative processor where the polarization in a ferroelectric film is utilized as the memory media in the system. In order to resolve the problem of depolarization in the film and the resultant degraded memory contents, a newly developed "Hetero-Gate Ferroelectric Floating Gate MOS" device was introduced to build associative circuitries. Experimental investigation on the ferroelectric film characteristics in such applications has been extensively conducted and it was shown that the system is most suited to such applications as mobile systems in which power dissipation is severely limited. ADP matching VLSI … More chip has been developed for episode memory recall. In episode memory, time sequences of events are stored and the most similar sequence needs be searched allowing some missing events or insertion of some extra events. This is a very computationally expensive processing. However, a very low-power and high-speed DP matching VLSI has been developed based on delay-encoding logic circuits. The system deals analog signals in the time domain while digital signals are utilized in the voltage domain, resulting in the fast and low power operation.As a test vehicle of algorithm development, a face localization and verification system has been developed. Using the image feature vectors based on the edge information extracted from images, faces are very robustly detected from various scenes under different illumination, defocusing, scaling and rotation conditions. Since edge filtering is a very computationally expensive processing, various VLSI chips specialized for the processing have been developed and real-time response capability has been achieved. By operating the image vector generation VLSI at only 100MHz, it outperforms the software processing running on a PC having 2GHz CPU by a factor of approximately 10,000. Less