Flash memory having a few numbers of floating nanometer-scale dot and atomic-layer-deposited tunnel gate dielectrics

针对闪存的微缩问题，提出了一种具有少量纳米级浮动点的器件。本研究的目的是利用电子束光刻技术制作具有少量纳米级浮动点的闪存，并精确控制其数量、位置和尺寸，并研究载流子的通道传导机制和保留机制，以明确器件的缩放极限。此外，另一个目的是使用原子层沉积隧道栅电介质来改善保留时间和右/擦除时间。为此，我们采用EB光刻和干湿蚀刻技术在Si窄通道或Si平面通道上制备了少量的浮动点，并系统地改变了浮动点的数量、大小和相邻点之间的距离，研究了浮动点的电特性。通过比较带和不带浮动点器件的电特性，我们证实了带浮动点器件确实实现了室温下的存储操作。通过估计器件的迟滞量作为网点数的函数，我们发现迟滞量随着网点数沿通道增加而增加。然而，迟滞与沿通道宽度的网点数无关。如果网点数大，即使有些网点有漏点，保留时间也不会缩短。因此，考虑到保留时间，增加沿通道的网点数对于改善存储特性是重要的。至于使用原子层沉积隧道栅介质来提高保留时间和右/擦除时间，我们无法进行。因此，我们将在未来这样做。

For scaling of flash memory, the device having a few numbers of floating nanometer-scale dot has been proposed. The purpose of this study is to fabricate the flash memory having a few numbers of floating nanometer-scale dot with precise control of the number, position, and size by using electron beam (EB) lithography, and examine the channel conduction mechanism of carrier and retention mechanism, for clarify the scaling limit of the device. Also, another purpose is to use atomic-layer-deposited tunnel gate dielectrics for the improvement of retention time and right/erase time.For the purpose, we fabricated a few number of floating dot on the Si narrow channel or Si plane channel by using the EB lithography and dry and wet etchings, and investigated the electrical characteristics with systematically changing the number, size of the dot and the distance between the adjacent dots. By comparing the electrical characteristics of the device with and without the floating dots, we confirmed that the device with floating dots indeed realizes a memory operation at room temperature. By estimating the amount of the hysteresis of the device as a function of the dot number, we found that the amount of the hysteresis increases with the dot number along the channel. However, the hysteresis has no correlation with the number of the dot along the width of the channel. If the dot number is large, the retention time will not be shorten even when some of the dots have a leakage. Therefore, taking the retention time into account, increasing the dot number along the channel is important for improving the memory characteristics.As to the usage of atomic-layer-deposited tunnel gate dielectrics for the improvement of retention time and right/erase time, we could not carried out. Therefore, we will do this in future.