Development of System-LSI Architectures Based on Merged Memory/Logic Technology

本研究项目的目标是开发系统LSI体系结构和计算机系统体系结构，或PPRAM（并行处理RAM），它们主要基于合并存储器/逻辑技术，并行/分布式处理技术和LSI间高速互连技术。本项目取得了以下研究成果。(1)大规模集成电路间高速互连标准（Inter-LSI high-speed interconnect standard，PPRAM-Link）：该项目为PPRAM-Link的物理层、逻辑层和API定义了一组规范，并以多种方式实现了这些规范。(2)参考PPRAM架构：该项目已经开发了几种适合合并DRAM/逻辑系统-LSI的架构，如（I）共享寄存器CMP（芯片多处理器），（ii）静态/动态可变行大小缓存，（iii）路径预测集关联缓存。(3)用于合并DRAM/逻辑LSI的DRAM刷新架构：该项目已经开发了两种适合合并的架构。 ...更多信息 艾德DRAM/逻辑系统-LSI，以减轻DRAM刷新特性因片上逻辑而恶化。(4)嵌入式系统-LSI的软硬件协同设计方法：该项目开发了一种基于软核处理器和Valen-C技术的软硬件协同设计方法。(5)软件控制的低功耗架构：该项目设计了一种处理器架构，或PowerPro，它可以根据系统负载通过软件控制来优化功耗。(6)系统级大规模集成电路的测试方法：本项目提出了一种适合系统级大规模集成电路的测试方法，它将内建自测试和外部测试相结合。(7)基于PPRAM的莫伊（分子轨道计算引擎）：该项目已开发出部分PPRAM应用，包括莫伊芯片和莫伊系统。莫伊芯片由32位整数RISC处理器、76位MO专用浮点处理器、1 Mb SRAM和PPRAM-Link接口组成。莫伊系统由多块莫伊板组成，每块板包括5块莫伊芯片和一个用于PPRAM-Link和IEEE 1394的桥接芯片。(8)用于电影的基于PPRAM的实时数字水印引擎：另一PPRAM应用是用于电影的实时数字水印引擎。该方案利用FPGA实现了一套小波变换函数、PPRAM-Link接口和PCI总线接口。少

The objectives of this research project are to develop system-LSI architectures and computer-system architectures, or PPRAM (Parallel Processing RAM), which are based mainly on merged memory/logic technology, parallel/distributed processing technology , and inter-LSI high-speed interconnect technology. The project has performed the following research results.(1) Inter-LSI high-speed interconnect standard, or PPRAM-Link : The project has defined a set of specifications for physical layer, logical layer, and API of PPRAM-Link ; and then it has implemented these specifications in several ways.(2) Reference PPRAM architectures : The project has developed a couple of architectures good for merged DRAM/logic system-LSI, such as (I) shared-register CMP (chip multiprocessor), (ii) statically/dynamically variable line-size cache, (iii) way-predicting set-associative cache.(3) DRAM refresh architectures for merged DRAM/logic LSI : The project has developed a couple of architectures good for merg … More ed DRAM/logic system-LSI so that alleviate the DRAM refresh characteristics to be worsened by on-chip logic.(4) Hardware/software codesign methodology for embedded system-LSI : The project has developed a hardware/software codesign methodology based on soft-core processor and Valen-C technologies.(5) Software-controlled low power architectures : The project has designed a processor architecture, or PowerPro, which can optimize the power consumption by means of software control according to the system load.(6) Test methodology for system-LSI : The project has proposed a test methodology good for system-LSI, which combines BIST and external test.(7) PPRAM-based MOE (molecular orbital calculation engine) : The project has developed some PPRAM applications, including MOE chips and MOE system. The MOE chip consists of a 32-bit integer RISC processor, a 76-bit MO-specific floating-point processor, 1Mb SRAM, and a PPRAM-Link interface. The MOE system consists of a number of MOE boards, each of which includes five MOE chips and a bridge chip for PPRAM-Link and IEEE1394.(8) PPRAM-based realtime digital-watermarking engine for movies : Another PPRAM application is a realtime digital-watermarking engine for movies. The project has implemented a suite of wavelet transformation function, PPRAM-Link interface and PCI-bus interface by means of FPGA. Less