A4A: Asynchronous design for analogue electronics

简而言之，这项研究是关于开发和应用传统上专注于数字系统的异步设计方法到模拟世界。例如，电源管理IC正在成为一个快速增长的研究领域-尺寸，性能和能源要求，以及现代ICT系统工程的整体整体性质，要求在功率转换器和控制器设计方面进行比以往任何时候都更彻底的创新。2012年，电源管理IC的整体市场价值为169亿美元，预计到2018年将增长至260亿美元（预测复合年增长率约为2.5%）。7%），预计2013年模拟设备的总出货量将增长14%，总销售收入为410亿美元）。虽然由于近似计算和更智能的服务质量管理等技术，数字（数据）路径中的错误变得不那么重要，但模拟块越来越成为新的信通技术系统中最薄弱的环节。模拟电路的设计必须在功能上正确，以避免影响整个系统的灾难性故障。除了设计的功能正确性，模拟电路的效率，特别是功率转换器本身，也是一个问题，因为它们正在成为一个重要的能源消耗，特别是当数据处理部分空闲时。该项目的范围集中在新的设计方法和工具上，这些方法和工具将支持模拟电路下面的数字电子设备。与数据处理数字硬件（“大数字”）相比，负责控制模拟模块的这一层逻辑可以被称为“小数字”。与数字系统相比，在当前的模拟工程实践中，可证明正确性的问题远远落后。“小数字”的模拟设计主要由模拟工程师完成，没有从规范到网表的任何正式步骤。没有可用的合成工具。该项目的主要目标是开发一种新的数字设计方法，以便纳入以模拟为主的系统或较大信通技术系统的子系统的开发过程。该方法将使用异步设计原则、规范、建模和相关工具支持，能够满足以下四个主要标准：1）数字和整个混合系统解决方案的鲁棒性。这将使建筑系统的速度无关，即操作规范（没有毛刺和危险）在一个广泛的动态范围的PVT变化。2）规格的清晰度。新的模型托换将消除目前的做法，特别设计的模拟系统与不存在的规格，数字控制。由于模拟信号的连续性，异步逻辑（如信号转换图（STG））的模型需要修改，以适合模拟设计人员使用。3）组合设计。基于条件偏序图（CPOG）的新模型将解决模拟电路中出现的众多模式，并实现复杂混合系统的规范、综合和验证。4）自动化至关重要。它将消除目前手工设计混合电路和几天的模拟来验证其正确性的做法。新的异步模拟（A4 A）工具将通过引入自动化综合和形式化验证流程，从根本上提高模拟工程师的设计生产力。这些标准将基本上标志着我们的研究路径，标志着什么对我们的目标很重要，以及我们期望在哪里取得可衡量的成果。我们的主要工业合作伙伴Dialog Semiconductor已经证实了这一点，他们愿意使用异步设计来开发其模拟IP解决方案，以应用于移动的系统、无线连接、汽车和工业领域。

Succinctly, this research is about developing and applying asynchronous design methods, which were traditionally focused on digital systems, to the analogue world.Power management ICs, for example, are becoming an area of rapid growth in research - the size, performance and energy requirements, as well as the overall holistic nature of modern ICT system engineering, call for a much more radical innovation in power converter and controller design than ever before. The overall market value for power management ICs had sales revenue of USD 16.9 billion in 2012 and is forecast to rise to USD 26 billion by 2018 (forecast CAGR ca. 7%), with total shipments of analogue devices forecast to jump 14% in 2013 - total sales revenue USD 41 billion). While errors in digital (data) paths are becoming less critical thanks to techniques such as approximate computing and smarter quality of service management, analogue blocks are becoming much more of a weakest link in new ICT systems. The design of analogue circuits must be functionally correct to avoid catastrophic failures that would affect the entire system. Besides the functional correctness of design, the efficiency of analogue circuits, particularly of the power converters themselves, is a problem as they are becoming a significant energy drain, particularly when the data processing parts are idle.The scope of this project is focused on the new design methods and tools that will support the digital electronics which is underneath the analogue circuits. In contrast with the data processing digital hardware ("big digital"), this layer of logic, responsible for controlling analogue blocks, can be named "little digital".The issue of provable correctness is lagging far behind in the current practice of analogue engineering compared to digital systems. Analogue design with "little digital" is largely done by analogue engineers without any formal steps from the specification to netlists. No synthesis tools are available. The project's main goal is to develop a new digital design methodology to be integrated in the process of developing predominantly analogue systems or subsystems of larger ICT systems. This methodology will use asynchronous design principles, specifications, modelling and associated tool support that would be able to address the following four main criteria:1) Robustness of the digital and the whole hybrid system solution. This will enable building systems that are speed-independent, i.e. operate according to specifications (without glitches and hazards) in a wide dynamic range of PVT variations.2) Clarity of specifications. The new model underpinning will eliminate the current practice of ad hoc design of the analogue systems with non-existent specification for digital control. Due to the continuous nature of analogue signals, the models for asynchronous logic like Signal Transition Graphs (STGs) will need to be modified and made suitable for the use by analogue designers.3) Compositional design. The novel models based on Conditional Partial Order Graphs (CPOGs) will address the multitude of modes occurred in analogue circuits and enable specification, synthesis and verification of complex hybrid systems.4) Automation is crucial. It will eliminate the current practice of manual design of hybrid circuits and days of simulation to validate their correctness. The new asynchronous for analogue (A4A) tools will radically improve design productivity of analogue engineers by introducing automated synthesis and formal verification flow.These criteria will essentially mark our research path with the signposts of what is significant to our aims, and where we expect to achieve measurable outcomes. They have been corroborated by our main industrial partner Dialog Semiconductor, who are willing to use asynchronous design in developing their analogue IP solutions for applications in Mobile Systems, Wireless Connectivity, Automotive and Industrial sectors.