Feasibility of Novel Deca-nanometer vertical MOSFETs for low-cost Radio Frequency Application

射频(RF)设备的市场多种多样，涵盖低电压(1.5、3V等)。用于移动应用程序。传统上，构建前端放大器所需的器件是在与主导整个系统实现的数字CMOS电路相同的工艺中构建的。最先进的(SOA)工艺相对昂贵，特别是对于小批量生产，这对较小的公司和初创企业具有吸引力。我们的建议是在标准数字CMOS工艺内提供高性能垂直MOSFET，以便最小特征尺寸可以比SOA大得多，从而允许更低成本的解决方案。VMOST的更高性能来自于易于使用标准离子注入垂直地产生非常短的沟道，而不是需要昂贵的图案化技术(光刻)的横向。我们已经展示了一些新的解决方案的可行性，以解决vMOST的一些固有问题。我们相信，具有高增益和高工作电压的高性能0.1um垂直晶体管将能够为市场提供显著的优势。像所有的开发一样，它取决于在经济上能够实现的业绩，这是这个项目的一个关键目标。一个低于0.1微米的晶体管应该表现出大约100 GHz的FT，从而为10 GHz以上提供有用的功率。这将允许在高达5 GHz的蜂窝和无线局域网应用的功率阶段更换GaAs和LDMOS设备。新的连接和卫星上行链路应用在最高12 GHz的频率下运行，因此垂直MOSFET在这一体制下的可行性是另一个目标。

Markets for radio frequency (RF) devices are various and cover ranges of low voltages (1.5, 3V etc.) for mobile applications. Conventionally, the devices required to build the front-end amplifiers are built within the same process as the digital CMOS circuitry which dominates the overall system realisation. The state-of the-art (SOA) CMOS processes are relatively expensive especially for lower volume production which is attractive to smaller companies and start-ups. Our proposal is to provide a high performance vertical MOSFET within a standard digital CMOS process such that the minimum feature size can be rather larger than SOA allowing a lower cost solution. The higher performance for the vMOST comes from the ease of producing a very short channel vertically using standard ion-implantation, rather than laterally which requires expensive patterning techniques (lithography). We have already shown the feasibility of a number of novel solutions to address some of the inherent propblems of vMOSTs. We believe that a high performance 0.1um vertical transistor with high gain and high operating voltage will be able to provide significant advantages for the market. Like all developments, it depends on the performance that can be achieved economically, and this is a key aim of this project. A sub- 0.1um transistor should exhibit an fT of around 100GHz and so provide useful power to over 10GHz. This would allow the replacement of GaAs and LDMOS devices in power stages of cellular and wireless LAN applications up to 5GHz. New connectivity and satellite uplink applications operate in frequencies up to 12GHz, and so the feasibility of the vertical MOSFET for this regime is a further objective.