On-chip voltage regulation in advanced technologies

硅技术的规模化使得单个芯片可以容纳数十亿个晶体管，这增加了晶体管密度和电子器件的工作频率，同时降低了每个晶体管的成本和能耗。然而，这也给功率转换、传输和管理带来了巨大的挑战，同时要最小化功率损耗和噪声。例如，在一个大型集成电路上，只有一小部分晶体管可以在全电压/频率下工作，以不超过热设计功率，而在任何给定时间，大部分电路块要么不活动，要么处于降低功率的状态，以满足功率和热的限制。这种利用限制促使半导体界开发更有效的功率转换和分配电路。本研究项目的总体目标是优化稳压-变换器电路和配电网络，以最大限度地减少电压转换过程中的功率损耗和电力管理中整个输电网的噪声。给定的目标要求电源管理电路在同一芯片上，并与专用的电源传输网络一起优化。提出了这种电压变换器和电源管理电路的电路结构和设计方法，并在28nm全贫硅中实现了硅上实现。与现有技术相比，该研究项目的结果有望实现更有效的功率转换，并与片外解决方案相比，实现更低的电源噪声。拟议的项目将推进最先进的片上稳压器和电力输送设计，这将有利于工业和更广泛的社区。研究成果将发表在主要会议和期刊上，以传播知识。一些学生将在项目期间接受培训，与行业合作的性质将使他们在未来的工作中处于正确的位置。**

The scaling of silicon technologies has enabled multi-billions of transistors in a single chip, which increases the transistor density and operating frequency of the electronics while reducing the cost and energy consumption per transistor. However, this also imposes a significant challenge in power conversion, delivery and management with minimal power loss and noise. For example, only a fraction of the transistors on a large integrated circuit can operate at full voltage/frequency to not exceed the thermal design power, and a large proportion of the circuit blocks is either inactive or in a reduced-power state at any given time to satisfy the power and thermal constraints. This utilization limitation has urged the semiconductor community to develop more efficient power conversion and distribution circuits. The overall objectives of the research project are to optimize voltage regulator-converter circuits and power distribution networks to minimize the power loss during voltage conversion and the noise throughout the power delivery network in power management. The given objectives require power management circuit to be on the same die and optimized together with the dedicated power delivery network. Circuit structures and design methodologies of such voltage converters and power management circuits are proposed, and an on-silicon realization is to be implemented in 28nm Fully Depleted Silicon. The results of the research project are expected to achieve more efficient power-conversion as compared to the existing techniques and lower power supply noise as compared to off-chip solutions. The proposed project will advance the state-of-the-art in on-chip voltage regulator and power delivery designs, which will benefit both industry and broader community. The research results will be published in premier conferences and journals for the dissemination of knowledge. A number of students will be trained during the project period, and the nature of the collaboration with industry will poise them in the right position for working in this field in the future. **