Study single event effects in logic circuits with 28nm CMOS bulk and SOI technologies

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Over the last four decades, silicon technology scaling has remarkably improved the integrated circuits (ICs) by increasing the transistor density and operating frequency while reducing the cost and energy consumption per transistor. However, the scaling of silicon technologies makes ICs more vulnerable to single event effects (SEEs) induced by energetic particles. In a well-designed IC, soft errors induced by SEEs appear to be the most troublesome both in terrestrial and high altitude or space environment. Storage cells are one of the major sources of soft errors in digital systems, and the soft error rates can be in 3 order differences for the designs from different vendors. Silicon-on-insulator (SOI) process has emerging to be a promising technology for reducing soft error rates in electronic systems. The objectives of the proposed project are to develop fault-tolerant logic circuits that are fabricated with the most advanced CMOS technologies in order to reduce the soft error rate in Cisco's switches and other electronic products. We will study SEE in both advanced bulk and SOI CMOS technologies (28nm process) and aim to develop fault-tolerant digital storage and sensing circuits. Various techniques including both layout and design techniques will be used to develop the fault-tolerant storage cells. Device and schematic simulation tools will be used for the investigation, so that SEE mitigation methods can be effectively developed. The fabricated test chips will be tested with pulsed laser, heavy ion, proton and neutron beams to verify the effectiveness of the designs. The results from different testing facilities will also be correlated. One PDF, two Ph.D. students and one mater's student will be trained to advance the technology and to work closely with the industrial partners. The research results will result in patentable technologies and publications in related journals and conferences. The Canadian industry partner (Cisco Canada) can adopt the technologies developed from this project to improve the reliability of their products such as switches and linecards. The project will also enhance the capability and expertise of the research group in the area of microelectronics reliability at the University of Saskatchewan.