EIA: Lithography for All-Vacuum Integrated Circuit Fabrication

EIA：全真空集成电路制造的光刻

• 批准号: 8707089
• 负责人: Michael Kozicki
• 金额: $ 5.95万
• 依托单位: Arizona State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1987
• 资助国家: 美国
• 起止时间: 1987-06-01 至 1990-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8707089&HistoricalAwards=false
• 关键词: EIA; Lithography; Vacuum; Integrated; Circuit

Integrated circuit fabrication is still widely carried out by transporting the substrates between individual pieces of equipment in a "cleanroom" environment. Since it is impossible to fully control the contaminant content of the air, there is ample opportunity for particulates or vapors to impinge on the materials being processed, thereby altering device characteristics and reducing product yield. A complete fabrication process, including product transfer, carried out under vacuum would result in a significant reduction of substrate contamination. Many process steps may be carried out under vacuum or at reduced pressure but one critical operation, namely lithography, may not. This is currently a barrier to the realization of all-vacuum processing. The objective of this program is to investigate As-S/Ag resist system deposition, exposure (optical and electron-beam), develop, and strip, under vacuum conditions to create a lithographical process which may ultimately be used in all-vacuum applications. Extensive microfabrication facilities will be used including equipment for evaporation and sputtering, direct step on wafer and contact exposure, high resolution e-beam lithography, parallel plate and reactive ion etching, and materials analysis by EDXA, WDS, and AES. The resulting high resolution process will be compatible with multiple exposure methods under vacuum and will allow considerable progress to be made in all-vacuum processing.

集成电路制造仍然广泛地通过在“洁净室”环境中的单个设备之间传送衬底来进行。由于不可能完全控制空气中的污染物含量，因此颗粒或蒸气有足够的机会撞击正在加工的材料，从而改变设备特性并降低产品产量。一个完整的制造过程，包括产品转移，在真空下进行，将显著减少衬底污染。许多工艺步骤可以在真空或减压下进行，但有一个关键操作，即光刻，可能不能。这是目前实现全真空加工的障碍。该项目的目标是研究As-S/Ag抗蚀剂系统在真空条件下的沉积、曝光(光学和电子束)、显影和剥离，以创造一种最终可能用于全真空应用的光刻工艺。将使用广泛的微加工设备，包括蒸发和溅射设备、晶片直接台阶和接触曝光设备、高分辨率电子束光刻设备、平行板和反应离子蚀刻设备，以及EDXA、WDS和AES材料分析设备。由此产生的高分辨率处理将与真空下的多种曝光方法兼容，并将使全真空处理取得重大进展。