Collaborative Research: Advanced High Dielectric Constant Gate Materials for CMOS Devices
Collaborative Research: Advanced High Dielectric Constant Gate Materials for CMOS Devices
批准号:
0223106
负责人:
Marvin White
金额:
$27.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing grant
财政年份:
2002
资助国家:
美国
项目状态:
已结题
起止时间:
2002-09-01 至 2005-08-31
中文摘要
德州理工大学(TTU)和利哈伊大学(LU)之间的项目是一个“合作”项目,旨在进行用于CMOS器件的先进、超薄、高介电常数(High-K)栅极材料的实验和理论研究。该项目的动机是对具有亚微米特征尺寸的先进CMOS集成电路的驱动,以及在防止硅反型层和覆盖栅电极之间的量子力学栅极电流的同时对栅电介质进行缩放的需要。二氧化硅栅电介质将被由一个或多个单分子层二氧化硅组成的单或双电介质膜所取代,以形成覆盖有高介电常数(High-K)绝缘体的界面过渡区。合作提案工作的基础在于两所大学的能力,这两所大学拥有德克萨斯理工大学在高K栅极材料方面的专业知识,以及利哈伊大学将这些材料集成到用于CMOS器件的高级栅绝缘体中的能力。德克萨斯理工大学将使用定制的电子束沉积系统形成High-K、Hf02或ZrO2栅电介质,该系统将被整合到利哈伊大学制造的先进CMOS器件和测试结构中。该合作项目将使用两所大学的综合和互补分析技术,如TTU的反射高能电子衍射(RHEED)和低能电子衍射(LEED),以及LU的角度分辨光电子能谱(ARXPS)和高分辨率透射电子显微镜(HRTEM)。将使用独特的测试结构和测量技术进行电学表征,以确定高K介质中的载流子陷阱。PI的多学科教员将把来自不同系和大学的学生聚集在一个项目中,以培养广泛的研究和教育经验。该项目通过与工业界的密切合作和接触而得到加强。
英文摘要
0223106WhiteThe project between Texas Tech University (TTU) and Lehigh University (LU) is a 'collaborative' program to conduct experimental and theoretical research in the area of advanced, ultra-thin, high dielectric constant (high-K) gate materials for CMOS devices. This project is motivated by the drive for advanced CMOS integrated circuits with sub-micron feature sizes and the need to scale the gate dielectric, while preventing quantum mechanical gate current between the silicon inversion layer and the overlying gate electrode. The Si02 gate dielectric will be replaced with a single or dual -dielectric film consisting of one or more monolayers of SiO2 to form the interfacial transition region covered with a high dielectric constant (high-K) insulator. The rationale for a collaborative proposal effort lies in the capabilities of the two universities with Texas Tech University expertise in high-K gate materials and Lehigh University integrating these materials into an advanced gate insulator for CMOS devices. Texas Tech University will form high-K, Hf02 or ZrO2 gate dielectrics with a custom electron-beam deposition system to be incorporated into advanced CMOS devices and test structures fabricated at Lehigh University. The collaborative project will employ the combined and complementary analytical techniques at both universities, such as reflection high-energy electron diffraction (RHEED) and low energy electron diffraction (LEED) at TTU combined with angle resolved photoelectron spectroscopy (ARXPS) and high-resolution transmission electron microscopy (HRTEM) at LU. Electrical characterization will be performed with unique test structures and measurement techniques to determine carrier trapping in the high-K dielectrics. The PI's multidisciplinary faculty will bring together students from different departments and universities in a project to foster a broad research and educational experience. The project is enhanced with close collaboration and outreach to industry.
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Charge Transport and Storage in Multi-Insulator Microstructures
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Charge Transport and Storage in Mnos Memory Devices
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财政年份:1982
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依托单位:
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