Thermal Effects in Integrated Circuits

集成电路中的热效应

• 批准号: 0541367
• 负责人: Sachin Sapatnekar
• 金额: --
• 依托单位: University of Minnesota-Twin Cities
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-03-15 至 2010-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0541367&HistoricalAwards=false
• 关键词: Thermal; Effects; Integrated; Circuits

ABSTRACT0541367Sachin SapatnekarU of MinnThermal Effects in Integrated CircuitsAs more components are packed on to an integrated circuit, a larger amount of heat is generated per unit area, placing strong demands on heat removal mechanisms that transmit this heat to the environment and keep the chip cool. Trends show that under today's design practices and the current economic model for packaging costs, on-chip temperatures will rise from one technology generation to the next. The resulting thermal stresses will degrade the reliability and performance of the circuit, and can result in unacceptable levels of unpredictability in the speed and power of a chip. Current-day techniques use a variety of simple approaches that control the power dissipation of the circuit rather than its temperature, but these will not scale well to future technologies, particularly since the thermal problem is projected to become even more acute as chips are further miniaturized. It is now imperative to consider temperature as a first-class design objective, and this is the goal of this research. There are two aspects to the proposed work: first, simulation techniques will be developed to determine the on-chip temperature distribution, and second, optimization methods for reducing the effects of these variations will be researched. This work supports the US semiconductor industry by enabling the continued progress along the Moore's law curve, and the research activities will help train students in this field. Moreover, some general purpose simulation/solution techniques developed in this research could have an impact beyond the field of integrated circuits, since these problems frequently arise in numerous other contexts in science and engineering.

随着越来越多的元件被封装到集成电路上，每单位面积产生大量的热量，对将这些热量传递到环境中并保持芯片冷却的散热机制提出了强烈的要求。 趋势表明，在当今的设计实践和当前封装成本的经济模式下，芯片上的温度将从一代技术到下一代技术不断上升。 由此产生的热应力将降低电路的可靠性和性能，并可能导致芯片速度和功率的不可预测性达到不可接受的水平。 目前的技术使用各种简单的方法来控制电路的功耗而不是其温度，但这些方法无法很好地扩展到未来的技术，特别是因为随着芯片的进一步小型化，热问题预计将变得更加严重。现在必须考虑温度作为一个一流的设计目标，这是本研究的目标。 有两个方面的拟议工作：第一，将开发仿真技术，以确定片上温度分布，第二，优化方法，以减少这些变化的影响将进行研究。 这项工作通过使摩尔定律曲线沿着持续进步来支持美国半导体行业，研究活动将有助于培养该领域的学生。 此外，在这项研究中开发的一些通用模拟/解决方案技术可能会产生超出集成电路领域的影响，因为这些问题经常出现在许多其他方面的科学和工程。