Design Automation Techniques for SOI and High-Performance Bulk CMOS Designs

SOI 和高性能 Bulk CMOS 设计的设计自动化技术

• 批准号: 0098117
• 负责人: Sachin Sapatnekar
• 金额: $ 33.5万
• 依托单位: University of Minnesota-Twin Cities
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2001
• 资助国家: 美国
• 起止时间: 2001-09-01 至 2004-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0098117&HistoricalAwards=false
• 关键词: Design; Automation; Techniques; SOI; Performance

In order to maintain the spectacular rates of growth in the semiconductor industry over the past three decades, it will be necessary in the future to move away from the most traditional ways of building VLSI circuits. This research will explore problems in this domain. The main thrust of the research is related to providing design automation support for circuits using silicon on insulator (SOI) technology, although some aspects of the work will have applicability to the widely used bulk CMOS technology. This research will develop SOI-specific synthesis techniques, as well as optimization techniques that enable the designer to exploit technologies such as dual threshold voltages. Issues related to related to physical design will also be considered.

为了保持半导体工业在过去30年中惊人的增长速度，未来有必要摆脱构建超大规模集成电路的最传统方法。 本研究将探讨这一领域的问题。 这项研究的主要目的是为使用绝缘体上硅（SOI）技术的电路提供设计自动化支持，尽管这项工作的某些方面将适用于广泛使用的体CMOS技术。 这项研究将开发SOI特定的合成技术，以及优化技术，使设计人员能够利用技术，如双阈值电压。 与物理设计相关的问题也将被考虑。