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CSR---EHS: Non-volatile Carbon Nanotube RAM based FPGA Architectures

CSR---EHS: Non-volatile Carbon Nanotube RAM based FPGA Architectures
CSR---EHS:基于非易失性碳纳米管 RAM 的 FPGA 架构
批准号:
0719936
负责人:
Niraj Jha
金额:
$30.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-08-01 至 2011-07-31

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中文摘要
翻译
新兴的纳米器件,如碳纳米管,被认为在未来的技术规模方面非常有前途。最近的一项创新使基于纳米管的非易失性随机存取存储器(NRAM)的制造成为可能,该存储器有望成为通用存储器。NRAM适用于独立和嵌入式存储器应用,并使用传统的光刻兼容制造工艺制造。NRAM比DRAM更快、更密集,功耗比DRAM或闪存低得多,速度与SRAM相似,并且对环境作用力(温度、磁性)具有很强的抵抗力。该项目的目标是探索一类基于NRAM的可编程计算机体系结构,称为现场可编程门阵列(FPGA)系列。PI小组在这类现场可编程门阵列上的初步工作表明,与传统的现场可编程门阵列相比,使用细粒度时态逻辑折叠的新概念可以将逻辑密度提高一个数量级以上,这使得逐个周期的动态重新配置成为可能。该项目的目标包括使用参数化技术映射和时态逻辑折叠工具来探索基于NRAM的FPGA空间,该工具采用混合的寄存器-传输/门级描述电路并将其映射到基于NRAM的FPGA系列实例。这项研究还将探索这种现场可编程门阵列在内存密集型多媒体应用中对计算单元集成存储器的适用性。拟议的工作将使基于NRAM的现场可编程门阵列及其相关映射器/文件夹系列具有良好的特性和高度的通用性。这些材料将包括在一门新的关于纳米技术设计的高级课程中。预计本科生将参与这项研究。女性和少数族裔学生将通过普林斯顿的总统奖学金计划被吸引到这项研究中。
英文摘要
Emerging nanodevices, such as carbon nanotubes, have been recognized as very promising for future technology scaling. A recent innovation has enabled the fabrication of nanotube-based non-volatile random-access memory (NRAM) that has the promise to become a universal memory. NRAMs are suitable for both standalone and embedded memory applications and are fabricated using traditional lithography-compatible manufacturing processes. An NRAM is considerably faster and denser than DRAM, has much lower power consumption than DRAM or flash, has similar speed to SRAM and is highly resistant to environmental forces (temperature, magnetism).The aim of this project is to explore an NRAM-based class of programmable computer architectures, known as a field-programmable gate array (FPGA) family. Initial work in the PI's group on such FPGAs has shown the feasibility of increasing the logic density by over an order of magnitude compared to traditional FPGAs, using the novel concept of fine-grain temporal logic folding, which makes cycle-by-cycle dynamic reconfiguration feasible.The objectives of this project include design space exploration of the NRAM-based FPGA space using a parameterized technology mapping and temporal logic folding tool that takes a mixed register-transfer/gate level description of a circuit and maps it to an NRAM-based FPGA family instance. The research will also explore the applicability of such FPGAs to computation-unit integrated memories for memory-intensive multimedia applications.The proposed work will make a well-characterized and highly versatile family of NRAM-based FPGAs and associated mapper/folder available to industry. The material will be included in a new senior-level course on Design with Nanotechnologies. Undergraduate students are expected to participate in this research. Female and minority students will be attracted to this research through Princeton's Presidential Fellowship Program.
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