Hierarchical Test Generation and Design For Testability of Core-Based Systems

本文研究的是基于核的系统的层次化和符号化测试生成与可测性设计技术。该系统可以是软核、硬核和硬核的组合。对于无法测试的软核，正在应用分层可测试性技术使其可测试。此外，还在开发添加硬件的技术，以使核心在功能上是透明的，并且可以在不丢失信息的情况下传播测试数据。该方法是集成可测试和透明的核心，以确保预先计算的测试序列的合理性。这种测试生成方法与内核的位宽无关。还在探索核心供应商内置了可测试性特征的坚固和坚硬的核心的情况。这里的方法包括：使用核心供应商提供的信息；使用内置的可测试性特性；以及通过核心之外的粘合逻辑提供透明度。

This research is on hierarchical and symbolic test generation and design for testability techniques for core- based systems. The system can be a combination of soft, firm and hard cores. In the case of untestable soft cores, hierarchical testability techniques are being applied to make them testable. Also techniques of adding hardware so the cores are functionally transparent and can propagate test data without information loss are being developed. The approach is to integrate testable and transparent cores to ensure justification of precomputed test sequences. This test generation approach is independent of the bit-width of the cores. The case of firm and hard cores which have testability features built into them by core providers is also being explored. Approaches here include: using information supplied by the core vendor; use of in-built testability features; and providing transparency through glue logic outside the core.