CPA-DA-T: A Collaborative Framework for Design and Fabrication of Metallic Carbon Nanotube based Interconnect Structures for VLSI Circuits and Systems Applications

提案ID: 0811880PI姓名：Kaustav BanerjeeInstitution: University of California-Santa barbara标题：摘要由于铜线的载流能力有限，半导体工业在互连领域面临着一个严峻的问题，目前铜线用于连接每个集成电路（IC）中的数十亿个晶体管，包括对信息传输至关重要的微处理器。加工和存储。随着集成电路的特征尺寸继续缩小到45纳米以下，铜线表现出显著的？尺寸效应吗?导致它们的电阻率急剧上升，这反过来又对它们的性能和可靠性产生不利影响——以载流能力的形式。铜互连的这种局限性最近被世界各地的领先半导体公司以及国际半导体技术路线图（ITRS）所强调，并有可能减缓甚至停滞半导体及相关产业的传统增长。因此，确定和开发新的互连解决方案至关重要。碳纳米管是一种比人类头发窄8万倍的微小纳米结构，已知具有惊人的电学、热学和机械性能，可以潜在地解决铜面临的挑战，从而延长铜的使用寿命。电气连接?。这些突出的特性大多来自于“低维”。碳纳米管——因为它们本质上是一维结构。研究人员第一次试图了解这些微小的结构如何有效地集成到微处理器和其他电路中，以解决对更快、更可靠的片上布线的迫切需求。碳纳米管互连结构也为超高密度储能元件（如电容器和电感器）的设计以及各种系统级架构创新提供了令人兴奋的前景。这个为期四年的合作项目汇集了一组科学家和工程师，以解决与各种电路和系统应用的碳纳米管互连结构的设计和制造相关的关键科学和工程挑战。研究人员采用跨学科的方法，结合了创新的工艺技术和电路/系统架构开发，由严格的建模、分析和计量技术支持。这为真正展示碳纳米管在克服纳米级集成电路的主要限制之一方面的前景提供了一个绝佳的机会，并有望对半导体工业产生广泛的影响。这项研究将有助于CMOS电路扩展到其极限，并为混合信号，模拟和射频（RF）信号处理应用以及三维集成电路设计开辟新的机会，从而保持美国在全球半导体市场的竞争力。该研究的更广泛影响包括碳纳米管在芯片外的应用，如？焊料?也可作为芯片和印刷电路板散热的优良热界面材料。整个计划还将研究与各级教育（K-12，本科，研究生，继续教育）联系起来，部分通过参与由教育专业人员设计的项目，除了关注纳米科学和工程领域代表性不足的群体的招聘和保留。

Proposal ID: 0811880PI Name: Kaustav BanerjeeInstitution: University of California-Santa BarbaraTitle: A Collaborative Framework for Design and Fabrication of Metallic Carbon Nanotube based Interconnect Structures for VLSI Circuits and Systems Applications ABSTRACTThe semiconductor industry is confronting an acute problem in the interconnect area due to the limited current carrying capability of copper wires, which are presently used to connect billions of transistors in every integrated circuit (IC) including microprocessors that are vital for information transmission, processing and storage. As IC feature sizes continue to be scaled below 45 nanometer, copper wires exhibit significant ?size effects? resulting in a sharp rise in their resistivity, which, in turn, has adverse impact both on their performance as well as reliability---in the form of current carrying capacity. This limitation of copper interconnects has been recently highlighted by various leading semiconductor companies around the world as well as in the International Technology Roadmap for Semiconductors (ITRS), and threatens to slow down or even stall the traditional growth of the semiconductor and related industries. Hence, it is critical to identify and develop new interconnect solutions. Carbon nanotubes, tiny nanostructures 80,000 times narrower than a human hair, are known to have amazing electrical, thermal and mechanical properties, and can potentially address the challenges faced by copper and thereby extend the lifetime of ?electrical interconnects?. Most of these outstanding properties arise from the ?low-dimensionality? of CNTs---since they are essentially 1-dimensional structures. The investigators seek to, for the first time, understand how these tiny structures can be efficiently integrated into microprocessors and other circuitry to address the dire need for faster and more reliable on-chip wiring. The CNT interconnect structures also offer exciting prospects for design of ultra high-density energy storage elements (such as capacitors and inductors), as well as various system-level architectural innovations. This collaborative four-year project brings together a team of scientists and engineers for addressing the key scientific and engineering challenges associated with the design and fabrication of CNT interconnect structures for various circuits and systems applications. The investigators employ an interdisciplinary approach that combines innovative process technology and circuit/system architecture development supported by rigorous modeling, analysis, and metrology techniques. This presents an outstanding opportunity to truly demonstrate the prospects of CNTs in overcoming one of the major limitations of nanometer scale ICs, and is expected to have wide implications for the semiconductor industry. This research will help scaling of CMOS circuits to its ultimate limits and also open new opportunities in mixed-signal, analog and radio-frequency (RF) signal processing applications as well as in 3-dimensional integrated circuit design, thereby maintaining U.S. competitiveness in the worldwide semiconductor market. Broader impact of the research includes emerging off-chip applications of carbon nanotubes as ?solder bumps? and also as an excellent thermal interface material for heat removal from chips and printed circuit boards. The overall program also ties research to education at all levels (K-12, undergraduate, graduate, continuing-education) partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.