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EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization

EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization
EAGER:探索具有 2D-TMD 的 3D 晶体管以实现终极小型化
批准号:
2332341
负责人:
Kaustav Banerjee
金额:
$25.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-08-15 至 2025-07-31

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中文摘要
翻译
金属氧化物半导体场效应晶体管(MOSFET)的不断小型化,使得系统集成密度、性能和能效的不断提高,使得人们有必要探索替代的新型器件结构。栅极全能(GAA)结构是目前最先进的FinFET(本质上是双栅MOSFET)的一种很有前途的替代方案,它具有对沟道的卓越栅极控制、减少的短沟道效应和增加的导通电流,如果使用合适的沟道材料,可以将晶体管的小型化维持到几个纳米的沟道长度。在这方面,采用新兴的层状二维材料(2DM)实现GaA结构可以显著提高GaA晶体管的能力,与使用传统半导体(如Si)的实现相比,因为2DM提供了几个优势。这些优势包括:2 DM本体的原子厚度和原始界面提供了出色的静电性(沟道电荷的栅极控制),支持在不牺牲栅极控制的情况下调整沟道长度;均匀的本体厚度提供了低器件到器件的变化性和强大的器件性能;大带隙和中等载流子有效质量(与Si相比)提供了抑制的关断电流。PI是2D-CMOS领域的先驱,对这些晶体管的各个方面都做出了重大贡献-从基本的电荷注入和传输理论到文献中报道的一些最好的晶体管的设计和实验演示。为期两年的探索性项目将涉及基于2DM的GaA场效应管(包括纳米片场效应管)的设计、制造和表征,以扩展MOSFET的可扩展性,从而支持摩尔定律。该项目的应用空间包括所有可以想到的在MOSFET上运行的电子产品,包括微处理器和存储器。因此,该项目预计将对半导体和电子行业产生广泛影响。此外,国际教育协会将利用各种成熟的教育平台来传播研究成果,并向广泛的用户提供这些成果。整个项目还将研究与所有级别的教育联系起来,包括K-12、本科生、研究生和少数族裔,部分通过参与由教育专业人员设计的项目,除了关注纳米科学和工程领域代表不足的群体的招募和保留。该项目将使用独特的原子到应用理论来研究和展示使用二维材料(2DM)设计门周围(GAA)场效应管(FET)架构的前景,这与迄今追求的方法完全不同。尽管在第一性原理量子输运理论-非平衡格林函数(NEGF)的指导下,PI小组的理论模拟表明,以2D过渡金属二卤化物(TMD)为沟道材料的合适设计的平面2D-FET在低待机功率和高性能晶体管设计中的性能都优于Si对应的器件,而针对GaA结构的这种缩放和性能分析研究还没有进行。从根本上说,实现这种功能设备架构所需的流程和增长优化也处于初级阶段,并未专门为该架构量身定做。因此,该项目包括:采用第一性原理密度泛函理论和NEGF传输形式法,对2DM使能的3D GaA晶体管架构(如纳米片FET)的电流和电容指标进行详细的性能和可扩展性分析;采用(和改进)先进的接触工程,以高效接触3D几何中堆叠的n-/p-2 DM沟道;确定用于集成到2D-TMD GaA晶体管架构的最佳高κ介质堆叠;以及最后,根据现有纳米制造设备的允许,进行单到多叠层沟道概念验证GaA晶体管架构的制造和现实演示。该研究项目的跨学科性质,涵盖基础2D材料物理、器件设计和纳米制造技术,以及理论模拟和紧凑建模,将确保拟议的研究想法是可行的,并为提供最佳结果而量身定做。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Continued miniaturization of metal-oxide-semiconductor field-effect-transistors (MOSFETs) to yield unremitting improvements in system integration density, performance, and energy-efficiency has necessitated the exploration of alternative novel device architectures. Gate-all-around (GAA) architecture is one of such promising alternatives to the state-of-the-art FinFET (essentially a double-gate MOSFET), that with its superior gate control over the channel, reduced short-channel effects, and increased ON-current, can sustain transistor miniaturization down to few nanometer channel lengths if implemented with suitable channel materials. In this regard, the implementation of GAA architectures with emerging layered two-dimensional materials (2DM) can significantly enhance the capabilities of the GAA transistors, compared to implementations with conventional semiconductors such as Si, because of the several advantages that 2DM offers. These benefits include excellent electrostatics (gate control of channel charge) afforded by the atomic thinness and pristine interfaces of the 2DM body that enable channel length scaling without sacrificing gate control, uniform body thicknesses offering low device-to-device variability and robust device performance, large bandgap and moderate carrier effective mass (compared to Si) offering suppressed OFF-current. The PI is a pioneer in the field of 2D-CMOS and has made major contributions to every aspect of these transistors - from fundamental charge injection and transport theory to the design and experimental demonstrations of some of the best transistors reported in the literature. The two-year exploratory project will involve the design, fabrication, and characterization of 2DM based GAA FETs (including nanosheet FETs) to extend the scalability of the MOSFET and thereby sustain Moore’s Law. The application space of the project includes every conceivable electronic product that runs on MOSFETs including microprocessors and memories. Therefore the project is expected to have wide implications for the semiconductor and electronics industries. Moreover, the PI will use various well established educational platforms to disseminate the research results and to make them available to a wide range of users. The overall project also ties research to education at all levels involving K-12, undergraduates, graduates, and minorities, partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.The project will employ a distinctive atoms-to-applications theory to study and demonstrate the promise of employing two-dimensional materials (2DM) in designing gate-all-around (GAA) field-effect-transistor (FET) architectures, which is radically different from the approaches pursued till date. While theoretical simulations from the PI’s group guided by first principles quantum transport theory – non equilibrium Green’s function (NEGF), have demonstrated that suitably designed planar 2D-FETs with 2D transition-metal-dichalcogenide (TMD) as the channel material can outperform Si counterparts in both low-standby-power and high-performance transistor designs for sub-10 nm channel lengths, such a scaling and performance analysis study for GAA architectures have not been carried out yet. Fundamentally, the process and growth optimizations required to realize such functional device architecture are also at their infancy and have not been specifically tailored for this architecture. The project therefore includes a detailed performance and scalability analysis for both current and capacitance metrics of 2DM enabled 3D GAA transistor architectures (such as nanosheet FETs) employing first principles density functional theory (DFT) and NEGF transport formalism; employment (and improvement) of advanced contact engineering for efficiently contacting stacked n-/p-2DM channels in 3D geometry; identification of optimal high-κ dielectric stack for integration into the 2D-TMD GAA transistor architecture; and finally, fabrication and realistic demonstration of single- to multi-stack channel proof-of-concept GAA transistor architectures permitted by available nanofabrication facilities. The interdisciplinary nature of the research project, spanning fundamental 2D materials physics, device design, and nano-fabrication techniques, as well as theoretical simulations and compact modeling, will ensure that the proposed research ideas are feasible and tailored to deliver optimal results.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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会议论文
FET:Small: An Integrated Unipolar-0.5T0.5R RRAM Crossbar Array for Neuromorphic Computing
NSF:EAGER: 2D Layered Heterostructure based Tunnel Field-Effect Transistors (TFETs) and Circuits
SHF: Medium: A Collaborative Framework for Developing Green Electronics for Next-Generation Computing Applications
SHF:Small: A CAD Framework for Coupled Electrical-Thermal Modeling of Interconnects in 3D Integrated Circuits
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