EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization

金属氧化物半导体场效应晶体管（MOSFET）的持续小型化以在系统集成密度、性能和能量效率方面产生不懈的改进，使得有必要探索替代的新颖器件架构。栅极全包围（GAA）架构是最先进的FinFET（本质上是双栅极MOSFET）的这样一种有前景的替代方案之一，其具有对沟道的上级栅极控制、减少的短沟道效应和增加的导通电流，如果用合适的沟道材料实现，则可以将晶体管小型化维持到几纳米沟道长度。在这方面，由于2DM提供的几个优点，与使用诸如Si的常规半导体的实现相比，使用新兴的分层二维材料（2DM）的GAA架构的实现可以显著增强GAA晶体管的能力。这些优点包括由2 DM主体的原子薄度和原始界面提供的出色静电（沟道电荷的栅极控制），可以在不牺牲栅极控制的情况下实现沟道长度缩放，均匀的主体厚度提供低器件到器件的变化性和稳健的器件性能，大带隙和适度的载流子有效质量（与Si相比）提供抑制的关断电流。PI是2D-CMOS领域的先驱，对这些晶体管的各个方面都做出了重大贡献-从基本的电荷注入和传输理论到文献中报道的一些最佳晶体管的设计和实验演示。这个为期两年的探索性项目将涉及基于2DM的GAA FET（包括纳米片FET）的设计、制造和表征，以扩展MOSFET的可扩展性，从而维持摩尔定律。该项目的应用领域包括在MOSFET上运行的所有可能的电子产品，包括微处理器和存储器。因此，该项目预计将对半导体和电子行业产生广泛影响。此外，PI将利用各种完善的教育平台来传播研究成果，并将其提供给广泛的用户。整个项目还将研究与涉及K-12，本科生，研究生和少数民族的各级教育联系起来，部分通过参与教育专业人士设计的计划，该项目将采用独特的原子应用理论来研究和证明使用二维材料（2DM）的前景在设计栅极全包围（GAA）场效应晶体管（FET）架构，这是从根本上不同的方法追求到目前为止。虽然来自PI小组的由第一原理量子输运理论-非平衡绿色函数（NEGF）指导的理论模拟已经证明，以2D过渡金属二硫属化物（TMD）作为沟道材料的适当设计的平面2D-FET可以在用于亚10 nm沟道长度的低待机功率和高性能晶体管设计中优于Si对应物，这种针对GAA体系结构的缩放和性能分析研究还没有被执行。从根本上说，实现这种功能器件架构所需的工艺和生长优化也处于起步阶段，尚未专门针对这种架构进行定制。因此，该项目包括对支持2DM的3D GAA晶体管架构的电流和电容指标的详细性能和可扩展性分析（例如纳米片FET）采用第一原理密度泛函理论（DFT）和NEGF传输形式主义;用于在3D几何形状中有效接触堆叠的n-/p-2DM沟道的先进接触工程（和改进）;识别用于集成到2D-TMD GAA晶体管架构中的最佳高κ电介质堆叠;以及最后，制造和现实演示可用纳米制造设施所允许的单到多堆叠沟道概念验证GAA晶体管架构。该研究项目的跨学科性质，跨越基础2D材料物理，器件设计和纳米制造技术，以及理论模拟和紧凑建模，该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响进行评估，被认为值得支持审查标准。

Continued miniaturization of metal-oxide-semiconductor field-effect-transistors (MOSFETs) to yield unremitting improvements in system integration density, performance, and energy-efficiency has necessitated the exploration of alternative novel device architectures. Gate-all-around (GAA) architecture is one of such promising alternatives to the state-of-the-art FinFET (essentially a double-gate MOSFET), that with its superior gate control over the channel, reduced short-channel effects, and increased ON-current, can sustain transistor miniaturization down to few nanometer channel lengths if implemented with suitable channel materials. In this regard, the implementation of GAA architectures with emerging layered two-dimensional materials (2DM) can significantly enhance the capabilities of the GAA transistors, compared to implementations with conventional semiconductors such as Si, because of the several advantages that 2DM offers. These benefits include excellent electrostatics (gate control of channel charge) afforded by the atomic thinness and pristine interfaces of the 2DM body that enable channel length scaling without sacrificing gate control, uniform body thicknesses offering low device-to-device variability and robust device performance, large bandgap and moderate carrier effective mass (compared to Si) offering suppressed OFF-current. The PI is a pioneer in the field of 2D-CMOS and has made major contributions to every aspect of these transistors - from fundamental charge injection and transport theory to the design and experimental demonstrations of some of the best transistors reported in the literature. The two-year exploratory project will involve the design, fabrication, and characterization of 2DM based GAA FETs (including nanosheet FETs) to extend the scalability of the MOSFET and thereby sustain Moore’s Law. The application space of the project includes every conceivable electronic product that runs on MOSFETs including microprocessors and memories. Therefore the project is expected to have wide implications for the semiconductor and electronics industries. Moreover, the PI will use various well established educational platforms to disseminate the research results and to make them available to a wide range of users. The overall project also ties research to education at all levels involving K-12, undergraduates, graduates, and minorities, partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.The project will employ a distinctive atoms-to-applications theory to study and demonstrate the promise of employing two-dimensional materials (2DM) in designing gate-all-around (GAA) field-effect-transistor (FET) architectures, which is radically different from the approaches pursued till date. While theoretical simulations from the PI’s group guided by first principles quantum transport theory – non equilibrium Green’s function (NEGF), have demonstrated that suitably designed planar 2D-FETs with 2D transition-metal-dichalcogenide (TMD) as the channel material can outperform Si counterparts in both low-standby-power and high-performance transistor designs for sub-10 nm channel lengths, such a scaling and performance analysis study for GAA architectures have not been carried out yet. Fundamentally, the process and growth optimizations required to realize such functional device architecture are also at their infancy and have not been specifically tailored for this architecture. The project therefore includes a detailed performance and scalability analysis for both current and capacitance metrics of 2DM enabled 3D GAA transistor architectures (such as nanosheet FETs) employing first principles density functional theory (DFT) and NEGF transport formalism; employment (and improvement) of advanced contact engineering for efficiently contacting stacked n-/p-2DM channels in 3D geometry; identification of optimal high-κ dielectric stack for integration into the 2D-TMD GAA transistor architecture; and finally, fabrication and realistic demonstration of single- to multi-stack channel proof-of-concept GAA transistor architectures permitted by available nanofabrication facilities. The interdisciplinary nature of the research project, spanning fundamental 2D materials physics, device design, and nano-fabrication techniques, as well as theoretical simulations and compact modeling, will ensure that the proposed research ideas are feasible and tailored to deliver optimal results.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.