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EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization

EAGER: Exploration of 3D-Transistors with 2D-TMDs for Ultimate Miniaturization
EAGER:探索具有 2D-TMD 的 3D 晶体管以实现终极小型化
批准号:
2332341
负责人:
Kaustav Banerjee
金额:
$25.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-08-15 至 2025-07-31

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中文摘要
翻译
金属氧化物半导体场效应晶体管(mosfet)的持续小型化,在系统集成密度、性能和能源效率方面取得了不懈的进步,因此有必要探索可替代的新型器件架构。栅极全能(GAA)架构是最先进的FinFET(本质上是双栅极MOSFET)的有前途的替代品之一,它具有对通道的优越栅极控制,减少了短通道效应,增加了导通电流,如果采用合适的沟道材料,可以将晶体管小型化到几纳米沟道长度。在这方面,与传统半导体(如Si)相比,使用新兴的层状二维材料(2DM)实现GAA架构可以显著提高GAA晶体管的性能,因为2DM提供了几个优势。这些优点包括原子厚度提供的优异静电(通道电荷的栅极控制)和2DM本体的原始接口,在不牺牲栅极控制的情况下实现通道长度缩放,均匀的本体厚度提供低器件间可变性和稳健的器件性能,大带隙和适度的载流子有效质量(与Si相比)提供抑制off电流。PI是2D-CMOS领域的先驱,并在这些晶体管的各个方面做出了重大贡献-从基本的电荷注入和输运理论到文献中报道的一些最好的晶体管的设计和实验演示。这个为期两年的探索性项目将涉及基于2DM的GAA场效应管(包括纳米片场效应管)的设计、制造和表征,以扩展MOSFET的可扩展性,从而维持摩尔定律。该项目的应用空间包括所有可以想象的在mosfet上运行的电子产品,包括微处理器和存储器。因此,该项目有望对半导体和电子工业产生广泛的影响。此外,民意调查将利用各种完善的教育平台,传播研究成果,并向广大用户提供。整个项目还将研究与包括K-12、本科生、研究生和少数族裔在内的各级教育联系起来,部分通过参与由教育专业人士设计的项目,此外还将重点放在招收和留住纳米科学和工程领域代表性不足的群体上。该项目将采用独特的原子到应用理论来研究和展示在设计栅极全能(GAA)场效应晶体管(FET)架构中使用二维材料(2DM)的前景,这与迄今为止所追求的方法完全不同。虽然PI小组在第一原理量子输运理论-非平衡格林函数(NEGF)的指导下进行的理论模拟已经证明,以2D过渡金属-二硫化物(TMD)作为通道材料的适当设计的平面2D- fet在低备用功率和高性能晶体管设计中优于Si对应物,用于低于10 nm的通道长度,但这种针对GAA架构的缩放和性能分析研究尚未进行。从根本上说,实现这种功能设备架构所需的流程和增长优化还处于起步阶段,还没有专门为这种架构量身定制。因此,该项目包括采用第一性原理密度泛函理论(DFT)和NEGF传输形式,对支持2DM的3D GAA晶体管架构(如纳米片场效应管)的电流和电容指标进行详细的性能和可扩展性分析;采用(和改进)先进的接触工程,有效地接触3D几何结构中的堆叠n-/p-2DM通道;确定集成到2D-TMD GAA晶体管结构中的最佳高κ介电层;最后,在可用的纳米制造设备允许的单到多堆栈通道概念验证的GAA晶体管架构的制造和现实演示。该研究项目的跨学科性质,涵盖了基本的二维材料物理、器件设计和纳米制造技术,以及理论模拟和紧凑建模,将确保所提出的研究思路是可行的,并量身定制,以提供最佳结果。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
Continued miniaturization of metal-oxide-semiconductor field-effect-transistors (MOSFETs) to yield unremitting improvements in system integration density, performance, and energy-efficiency has necessitated the exploration of alternative novel device architectures. Gate-all-around (GAA) architecture is one of such promising alternatives to the state-of-the-art FinFET (essentially a double-gate MOSFET), that with its superior gate control over the channel, reduced short-channel effects, and increased ON-current, can sustain transistor miniaturization down to few nanometer channel lengths if implemented with suitable channel materials. In this regard, the implementation of GAA architectures with emerging layered two-dimensional materials (2DM) can significantly enhance the capabilities of the GAA transistors, compared to implementations with conventional semiconductors such as Si, because of the several advantages that 2DM offers. These benefits include excellent electrostatics (gate control of channel charge) afforded by the atomic thinness and pristine interfaces of the 2DM body that enable channel length scaling without sacrificing gate control, uniform body thicknesses offering low device-to-device variability and robust device performance, large bandgap and moderate carrier effective mass (compared to Si) offering suppressed OFF-current. The PI is a pioneer in the field of 2D-CMOS and has made major contributions to every aspect of these transistors - from fundamental charge injection and transport theory to the design and experimental demonstrations of some of the best transistors reported in the literature. The two-year exploratory project will involve the design, fabrication, and characterization of 2DM based GAA FETs (including nanosheet FETs) to extend the scalability of the MOSFET and thereby sustain Moore’s Law. The application space of the project includes every conceivable electronic product that runs on MOSFETs including microprocessors and memories. Therefore the project is expected to have wide implications for the semiconductor and electronics industries. Moreover, the PI will use various well established educational platforms to disseminate the research results and to make them available to a wide range of users. The overall project also ties research to education at all levels involving K-12, undergraduates, graduates, and minorities, partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.The project will employ a distinctive atoms-to-applications theory to study and demonstrate the promise of employing two-dimensional materials (2DM) in designing gate-all-around (GAA) field-effect-transistor (FET) architectures, which is radically different from the approaches pursued till date. While theoretical simulations from the PI’s group guided by first principles quantum transport theory – non equilibrium Green’s function (NEGF), have demonstrated that suitably designed planar 2D-FETs with 2D transition-metal-dichalcogenide (TMD) as the channel material can outperform Si counterparts in both low-standby-power and high-performance transistor designs for sub-10 nm channel lengths, such a scaling and performance analysis study for GAA architectures have not been carried out yet. Fundamentally, the process and growth optimizations required to realize such functional device architecture are also at their infancy and have not been specifically tailored for this architecture. The project therefore includes a detailed performance and scalability analysis for both current and capacitance metrics of 2DM enabled 3D GAA transistor architectures (such as nanosheet FETs) employing first principles density functional theory (DFT) and NEGF transport formalism; employment (and improvement) of advanced contact engineering for efficiently contacting stacked n-/p-2DM channels in 3D geometry; identification of optimal high-κ dielectric stack for integration into the 2D-TMD GAA transistor architecture; and finally, fabrication and realistic demonstration of single- to multi-stack channel proof-of-concept GAA transistor architectures permitted by available nanofabrication facilities. The interdisciplinary nature of the research project, spanning fundamental 2D materials physics, device design, and nano-fabrication techniques, as well as theoretical simulations and compact modeling, will ensure that the proposed research ideas are feasible and tailored to deliver optimal results.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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会议论文
FET:Small: An Integrated Unipolar-0.5T0.5R RRAM Crossbar Array for Neuromorphic Computing
NSF:EAGER: 2D Layered Heterostructure based Tunnel Field-Effect Transistors (TFETs) and Circuits
SHF: Medium: A Collaborative Framework for Developing Green Electronics for Next-Generation Computing Applications
SHF:Small: A CAD Framework for Coupled Electrical-Thermal Modeling of Interconnects in 3D Integrated Circuits
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