SHF: Medium: A Collaborative Framework for Developing Green Electronics for Next-Generation Computing Applications

信息技术（IT）产业正面临着电子产品的功率和能量消耗增加的形式的尖锐问题，这预计将对全球能源危机产生巨大影响。这在一定程度上是因为IT行业的能源消耗中有很大一部分来自计算组件。(such作为服务器）的能量需求，这又取决于这些组件中的各种集成电路的功耗。因此，设计低功耗和高能效的集成电路或绿色电子产品是维持全球IT行业不可逆转增长的关键领域。 实现能量效率对于用于移动的应用中的所有电子电路来说对于增加电池寿命也是至关重要的。 可以通过降低动态功耗和泄漏功耗来实现能效。然而，使用传统技术降低功率在22纳米技术节点之外变得越来越困难。 这是由于在这样的纳米级器件中，用于降低功率的最有效的调节器（即电源电压）不能像早期技术代中那样快速地缩放而不招致由于不能同时降低阈值电压而引起的显著性能损失。 由于MOSFET的开关特性的非突变性质，阈值电压的同时缩放（其对于保持器件电流的特定导通与关断比（其在晶体管用作开关的数字电路中是必不可少的）是必不可少的）导致亚阈值泄漏（关断状态）电流的显著增加，从而使得器件非常能量低效。该项目旨在通过设计由新型电子设备实现的电路和系统，在最基本的层面上解决这个关键问题，这些电子设备的开关行为接近理想，也就是说，它们几乎可以立即从ON状态切换到OFF状态，反之亦然。 特别是，PI计划设计和制造超节能异质结Tunnel场效应晶体管（T-FET），该晶体管采用带到带隧穿（BTBT）形式的根本不同的注入机制，以实现接近理想的开关。他们还计划为这些器件开发必要的建模/仿真和优化技术，并探索由这些器件专门支持的电路和系统，以展示电子产品前所未有的功耗和节能效果。这个为期四年的合作项目汇集了一支杰出的科学家团队，旨在解决MOSFET的一个基本限制，预计将对半导体和电子行业产生广泛的影响。 该项目预计将帮助数字开关和电路（包括高性能微处理器）达到其极限（在密度和性能方面），并在嵌入式存储器（包括DRAM和闪存）和远程传感器方面开辟新的机会，从而保持美国在全球半导体市场的竞争力。 拟议研究的更广泛影响也得到了广泛认可，特别是鉴于新兴的3-D IC，其中低泄漏和相对温度不敏感的T-FET的集成可用于构建下一代高性能和低功耗集成电路。整个计划还将研究与各级教育（K-12，本科，研究生，继续教育）联系起来，部分通过参与教育专业人士设计的计划，除了专注于招聘和保留纳米科学和工程中代表性不足的群体。

The information technology (IT) industry is confronting an acute problem in the form of increasing power and energy consumption by electronic products, which is projected to have dramatic impact on the global energy crisis. This is partly due to the fact that a significant fraction of the energy consumption in the IT industry results from the computing components? (such as servers) energy need, which in turn, depends on the power consumption of the various integrated circuits in these components. Hence, designing low-power and energy-efficient integrated circuits or Green Electronics constitutes a key area for sustaining the irreversible growth of the global IT industry. Achieving energy-efficiency is also of critical importance for all electronic circuits used in mobile applications for increasing the battery life. Energy-efficiency can be achieved by lowering both dynamic and leakage power consumption. However, lowering of power using traditional techniques becomes increasingly difficult beyond the 22 nanometer technology node. This is due to the fact that in such nanoscale devices, the most effective knob used for lowering power, namely the power supply voltage, cannot be scaled as rapidly as in earlier technology generations without incurring significant performance penalty arising from the inability to simultaneously reduce the threshold voltage. Simultaneous scaling of threshold voltage, which is essential for maintaining a certain ON to OFF ratio of the device currents (that is essential in digital circuits where the transistors are used as switches), leads to a substantial increase in the sub-threshold leakage (OFF state) current, owing to the non-abrupt nature of the switching characteristics of MOSFETs, thereby making the devices very energy inefficient. This project aims to address this critical issue at the most fundamental level by designing circuits and systems enabled by novel electronic devices whose switching behaviors are near-ideal, that is, they can move from ON to OFF state and vice-versa, almost instantly. In particular, the PIs plan to design and fabricate ultra energy-efficient heterojunction Tunneling Field-Effect Transistors (T-FETs) that employ a fundamentally different injection mechanism in the form of band-to-band tunneling (BTBT) to achieve near ideal switching. They also plan to develop necessary modeling/simulation, and optimization techniques for these devices, and explore circuits and systems specifically enabled by these devices to demonstrate unprecedented power and energy savings in electronic products. This collaborative four-year project brings together an outstanding team of scientists for addressing one of the fundamental limitations of MOSFETs and is expected to have wide implications for the semiconductor and electronics industries. The project is expected to help digital switches and circuits (including high-performance microprocessors) to attain their ultimate limits (in terms of density and performance) and also open new opportunities in embedded memories (including DRAMs and Flash) and remote sensors, thereby maintaining U.S. competitiveness in the worldwide semiconductor market. Broader impact of the proposed research is also well recognized, particularly in the light of emerging 3-D ICs, where integration of low leakage and relatively temperature insensitive T-FETs could be exploited to build next-generation high-performance and low-power integrated circuits. The overall program also ties research to education at all levels (K-12, undergraduate, graduate, continuing-ed) partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.