Parameterized Architecture-Level Thermal Modeling and Characterization for Multi-Core Microprocessor Design
Parameterized Architecture-Level Thermal Modeling and Characterization for Multi-Core Microprocessor Design
批准号:
0902885
负责人:
Sheldon Tan
金额:
$25.95万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-08-01 至 2013-07-31
中文摘要
主要提案#:0902885标题:针对多核微处理器设计的参数化体系结构级热建模和表征PI:Sheldon X.-D.Tan,加州大学Riversideco电气工程系,加州大学河滨分校电气工程系,UC Riverside Inst:电气工程系,UC Riverside Inst:电气工程系CoPI Inst:加州大学河滨分校Inst:加州大学河滨分校ABSTRACT多核(也称为芯片-多处理器(CMP))架构是当前和未来微处理器设计的趋势。它们通过线程级并行、更好的功率/热扩展以及通过设计重用轻松设计来提供更好的性能。然而,功耗/散热考虑仍然是多核微处理器设计的首要限制因素。多核微处理器的核心和体系结构级别的热感知设计空间探索成为关键的设计问题。这项研究旨在探索在多核微处理器设计中建立紧凑的、参数化的、瞬时热模型的新技术,以实现高效的热感知设计空间探索。该项目由三个部分组成:(1)架构级行为暂态热建模与表征;(2)考虑可变设计参数的参数化热建模;(3)热模型优化与简化。所提出的方法是一种自上而下的黑盒方法,这意味着它不需要任何关于系统内部结构的知识;这种方法使得所提出的方法非常通用和灵活,这与现有方法形成了鲜明的对比。模型的准确性由来自硬件的测量或精确计算的热功率信息保证。这些参数化模型可以适应不同的设计变量参数,从而有效地探索设计空间。本研究成果将显著增加热模拟多核设计的核心知识。它将为建筑界提供一种新的替代方法来补充现有的架构级热模型。由于PIS将与SRC密切合作,拟议的项目将对工业中的热感知多核微处理器设计产生直接影响。这笔赠款将使PI能够雇佣更多的女性和代表不足的少数族裔学生,为美国科学和技术劳动力的更大多样性做出贡献。
英文摘要
"This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5)."Lead Proposal#: 0902885Title: Parameterized Architecture-Level Thermal Modeling and Characterization for Multi-Core Microprocessor DesignPI: Sheldon X.-D. Tan, Dept of Electrical Engineering, UC Riversideco-PI: Yingbo Hua, Dept of Electrical Engineering, UC Riverside Inst: Department of Electrical EngineeringCoPI Inst:University of California at RiversideABSTRACTMulticore (also known as so-called chip-multiprocessors (CMP)) architectures are the trend for current and future microprocessor designs. They provide better performance via thread-level parallelism, better power/thermal scaling, and easy design by design reuse. However, power/thermal considerations are still the first-class constraints for multicore microprocessor designs. Thermal-aware design space explorations at core and architecture level for multicore microprocessors become critical design issues. This research seeks to explore new techniques of building compact parameterized, transient thermal models for efficient thermal-aware design space explorations in multicore microprocessor designs. The project consists of three thrusts: (1) Architecture-level behavioral transient thermal modeling and characterization; (2) Parameterized thermal modeling considering variable design parameters; (3) Thermal model optimization and reduction. The proposed method is a top-down, black-box approach, meaning that it does not require any knowledge of the internal structures of the systems; This approach makes the proposed method very general and flexible, which contrasts the existing approaches. The accuracy of the models is ensured by the measured or precisely computed thermal-power information from hardware. The parameterized models can accommodate different design variable parameters for efficient design space explorations.The outcome of this research will add significantly to the core knowledge of thermal modeling multicore design. It will provide a new alternative way to complement existing architecture-level thermal models for the architecture community. Since the PIs will work closely with SRC, the proposed project will have immediate impacts on thermal-aware multicore microprocessor design in industry. This grant will enable the PI to hire more women and underrepresented minority students to contribute to the greater diversity in America's science and technology workforce.
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