SHF:Small: EM-Aware Physical Design and Run-Time Optimization for sub-10nm 2D and 3D Integrated Circuits

电迁移（EM）已经成为纳米级集成电路（IC）和新兴的三维（3D）堆叠IC的主要设计约束和可靠性问题。 由于其重要性，近年来在电磁建模和快速数值评估技术方面取得了许多进展。 然而，这些先进的EM模型还没有充分利用现有的EM感知的物理设计和优化方法，以减少和减轻过于保守的VLSI设计实践。新的电磁模型可以自然地考虑互连线的电磁失效和电磁老化过程的恢复效果的导线拓扑和结构的影响，从而在物理设计阶段的电磁优化打开了新的机会。在此奖项中探索的新型EM优化技术将在持续积极的晶体管缩放和增加功率密度的情况下提高IC可靠性。 本计画之研究将有助于提升奈米超大型积体电路之电磁感应物理设计与最佳化之核心知识与技术。该研究员将寻求招募代表性不足的少数民族学生，以进一步促进美国科学和技术劳动力的多样性。该项目将为传统的二维（2D）和新兴的纳米级3D堆叠IC开发先进的EM感知物理优化技术和运行时EM缓解技术。首先，该研究将基于新提出的通用互连树EM不朽检查规则，为主流2D和新兴3D IC的功率传输网络开发新的EM感知优化技术。新的优化算法还将考虑EM引起的老化效应，以便使用更准确的EM寿命估计方法进行目标寿命优化。其次，研究将探索EM老化过程的运行时间恢复效果，以延长3D堆叠IC中信号和电源/接地（P/G）网络的EM寿命。因此，新的优化方法将有助于延长3D堆叠IC的使用寿命。该奖项反映了NSF的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

Electro-Migration (EM) has emerged as a major design constraint and reliability issue for nano-meter-scale integrated circuits (ICs) and emerging three-dimensional (3D) stacked ICs. Due to its importance, many advances have been made recently in EM modeling and fast numerical assessment techniques. However, those advanced EM models have not been fully exploited by existing EM-aware physical design and optimization methods to reduce and mitigate the overly conservative VLSI design practices. The new EM models can naturally consider wire topology and structure impacts on the EM failures of interconnect wires and recovery effects of EM aging process for the first time, thus opening new opportunities for EM optimization at physical design stages. Novel EM optimization techniques to be explored in this award will improve IC reliability amid continued aggressive transistor scaling and increasing power density. The research in this project will contribute significantly to the core knowledge and technologies of EM-aware physical design and optimization for nano-meter VLSI designs. This investigator will seek to recruit underrepresented minority students to further contribute to the diversity in U.S. science and technology workforce.This project will develop advanced EM-aware physical optimization techniques and run-time EM mitigation techniques for traditional two-dimensional (2D) and emerging 3D stacked ICs in the nano-meter regime. First, the research will develop new EM-aware optimization techniques for power delivery networks of mainstream 2D and emerging 3D ICs based on the newly proposed EM immortality-check rules for general interconnect trees. The new optimization algorithms will also consider the EM-induced aging effects for targeted lifetime optimization using more accurate EM lifetime estimation methods. Second, the research will explore the run-time recovery effects of the EM aging process to extend the EM lifetime of the signal and power/ground (P/G) networks in 3D stacked ICs. The new optimization methods will, thus, help extend the lifetime of the 3D stacked ICs.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.