SHF:Small: EM-Aware Physical Design and Run-Time Optimization for sub-10nm 2D and 3D Integrated Circuits

电迁移 (EM) 已成为纳米级集成电路 (IC) 和新兴三维 (3D) 堆叠 IC 的主要设计约束和可靠性问题。 由于其重要性，最近在电磁建模和快速数值评估技术方面取得了许多进展。 然而，现有的 EM 感知物理设计和优化方法尚未充分利用这些先进的 EM 模型来减少和缓解过于保守的 VLSI 设计实践。新的EM模型可以自然地首次考虑布线拓扑和结构对互连线EM故障的影响以及EM老化过程的恢复效果，从而为物理设计阶段的EM优化提供了新的机会。该奖项将探索的新颖的 EM 优化技术将在持续积极的晶体管缩小和增加功率密度的情况下提高 IC 的可靠性。 该项目的研究将对纳米超大规模集成电路设计的电磁感知物理设计和优化的核心知识和技术做出重大贡献。该研究人员将寻求招募代表性不足的少数族裔学生，以进一步为美国科技劳动力的多样性做出贡献。该项目将为纳米领域的传统二维 (2D) 和新兴 3D 堆叠 IC 开发先进的电磁感知物理优化技术和运行时电磁缓解技术。首先，该研究将基于新提出的通用互连树的 EM 永生性检查规则，为主流 2D 和新兴 3D IC 的电力传输网络开发新的 EM 感知优化技术。新的优化算法还将考虑电磁引起的老化效应，使用更准确的电磁寿命估计方法进行目标寿命优化。其次，该研究将探索电磁老化过程的运行时恢复效应，以延长 3D 堆叠 IC 中信号和电源/接地 (P/G) 网络的电磁寿命。因此，新的优化方法将有助于延长 3D 堆叠 IC 的使用寿命。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

Electro-Migration (EM) has emerged as a major design constraint and reliability issue for nano-meter-scale integrated circuits (ICs) and emerging three-dimensional (3D) stacked ICs. Due to its importance, many advances have been made recently in EM modeling and fast numerical assessment techniques. However, those advanced EM models have not been fully exploited by existing EM-aware physical design and optimization methods to reduce and mitigate the overly conservative VLSI design practices. The new EM models can naturally consider wire topology and structure impacts on the EM failures of interconnect wires and recovery effects of EM aging process for the first time, thus opening new opportunities for EM optimization at physical design stages. Novel EM optimization techniques to be explored in this award will improve IC reliability amid continued aggressive transistor scaling and increasing power density. The research in this project will contribute significantly to the core knowledge and technologies of EM-aware physical design and optimization for nano-meter VLSI designs. This investigator will seek to recruit underrepresented minority students to further contribute to the diversity in U.S. science and technology workforce.This project will develop advanced EM-aware physical optimization techniques and run-time EM mitigation techniques for traditional two-dimensional (2D) and emerging 3D stacked ICs in the nano-meter regime. First, the research will develop new EM-aware optimization techniques for power delivery networks of mainstream 2D and emerging 3D ICs based on the newly proposed EM immortality-check rules for general interconnect trees. The new optimization algorithms will also consider the EM-induced aging effects for targeted lifetime optimization using more accurate EM lifetime estimation methods. Second, the research will explore the run-time recovery effects of the EM aging process to extend the EM lifetime of the signal and power/ground (P/G) networks in 3D stacked ICs. The new optimization methods will, thus, help extend the lifetime of the 3D stacked ICs.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.