SHF:Small:GPU-Based Many-Core Parallel Simulation of Interconnect and High-Frequency Circuits

基于通用图形处理单元（GPU）的并行计算提供了大规模的众核并行性，并且可以提供比传统单核和现有通用多核计算技术惊人的性能改进。通用图形处理器（GPGPU）的出现，引起了科学界的极大兴趣，可以用来解决许多计算密集型的问题。然而，在VLSI设计实践中，许多重要的工程计算问题并没有充分利用GPU的计算能力。大规模的全球互连，射频（RF）和毫米波（MM）集成电路（IC）在非常高的频率仍然是芯片设计师面临的难题模拟。设计新的并行和可扩展的计算算法，可以释放基于GPU的并行计算技术的潜力，成为非常可取的。 本研究旨在探讨新的并行仿真方法来解决大规模互连电路和模拟/RF/MM集成电路基于单节点通用GPU或联网GPU上的计算机（GPU集群）。 首先，PI将研究基于结构化互连电路（如GPU或GPU集群上的片上电源传输和时钟分配网络）的解析解的新并行仿真算法。 第二，PI建议开发一种非常有效的数值并行仿真算法来分析一般互连。新算法将执行电路复杂度降低，以提高效率。私家侦探？的团队将研究并行化该方法中的主要计算步骤。第三，PI计划为高频电路（RF/MM）开发新的并行射击牛顿法。新方法将探索结构化Krylov子空间和基于GPU的并行化，以提高效率以及RF/MM集成电路仿真的收敛性。本研究的成果将大大增加GPU和GPU集群系统上的线性和非线性动力系统的并行数值分析的核心知识。通过与行业合作伙伴的合作，PI预计将对设计界产生直接影响，以提高纳米VLSI系统的设计生产力。 研究结果还将帮助电子设计自动化（EDA）社区在探索当前和未来的通用GPU时获得更多的洞察力，以便在GPU和多核系统上并行化整个EDA工具。 拟议研究和相关培训的跨学科性质将使学生在竞争激烈的高科技就业市场中获得关键技能。这笔赠款将使PI雇用更多的女性和代表性不足的少数民族学生，以进一步促进美国的多样性？的科学和技术劳动力。

Parallel computing based on the general purpose Graphic Processing Unit (GPU) provide massive many-core parallelism and can deliver staggering performance improvements over traditional single-core and existing general multi-core computing techniques. The recent introduction of general-purpose GPU (GPGPU) has gained strong interests from the scientific community to tackle many computationally intensive problems. The GPU computing powers, however, have not been fully exploited for many important engineering computing problems in the VLSI design practices. Simulation of massive global interconnects, radio-frequency (RF) and millimeter-wave (MM) integrated circuits (ICs) at very high frequencies remain as difficult problems confronting chip designers. Designing new parallel and scalable computing algorithms, which can unleash the potentials of GPU-based parallel computing techniques, become highly desirable. This research seeks to investigate new parallel simulation approaches to solving massive interconnect circuits and analog/RF/MM integrated circuits based on single node general GPU or networked GPUs on a computer (GPU-cluster). First, the PI will investigate new parallel simulation algorithms based on analytic solution for structured interconnect circuits like on-chip power delivery and clock distribution networks on a GPU or GPU-cluster. Second, the PI proposes developing a very efficient numerical parallel simulation algorithm for analyzing general interconnects. The new algorithm will perform circuit complexity reduction to improve the efficiency. The PI?s team will investigate to parallelize the major computing steps in this method. Third, the PI plans to develop new parallel shooting-Newton methods for high-frequency circuits (RF/MM). The new method will explore structured Krylov-subspace, and GPU-based parallelization to improve efficiency as well as the convergence of RF/MM integrated circuit simulation. The outcome of this research will add significantly to the core knowledge of parallel numerical analysis of linear and nonlinear dynamic systems on the GPU and GPU-cluster systems. By working with the industry partner, the PI expects to bring immediate impacts on the design community to improve the design productivity for nanometer VLSI systems. The research results will also help the electronic design automation (EDA) community to gain more insight in exploring the current and future general-purpose GPUs for parallelizing entire EDA tools on GPUs and multicore systems. The interdisciplinary nature of proposed research and relevant training will allow students to gain critical skills in the highly competitive high-tech job market. This grant will enable the PI to hire more female and underrepresented minority students to further contribute to the diversity in America?s science and technology workforce.