SHF:Small:GPU-Based Many-Core Parallel Simulation of Interconnect and High-Frequency Circuits

基于通用图形处理器(GPU)的并行计算提供了巨大的多核并行性，与传统的单核和现有的通用多核计算技术相比，可以提供惊人的性能改进。最近通用图形处理器(GPGPU)的引入引起了科学界的浓厚兴趣，以解决许多计算密集型问题。然而，在VLSI设计实践中，对于许多重要的工程计算问题，GPU的计算能力并没有得到充分的利用。大规模全球互连、射频(RF)和毫米波(MM)集成电路(IC)在甚高频下的模拟仍然是芯片设计者面临的难题。设计新的并行和可扩展的计算算法，以释放基于GPU的并行计算技术的潜力，成为人们非常期望的。本研究旨在探索新的并行模拟方法来解决大规模互连电路和基于单节点通用GPU或计算机上联网的GPU的模拟/射频/MM集成电路。首先，PI将研究基于解析解的新的并行仿真算法，用于GPU或GPU集群上的片上功率输送和时钟分配网络等结构化互连电路。其次，PI建议开发一种非常高效的用于分析一般互连的数值并行模拟算法。新算法将通过降低电路复杂度来提高效率。皮？S团队将研究如何将该方法中的主要计算步骤并行化。第三，PI计划开发用于高频电路(RF/MM)的新的并行打靶牛顿法。新方法将探索结构化Krylov子空间和基于GPU的并行化，以提高RF/MM集成电路模拟的效率以及收敛。这一研究成果将大大丰富在GPU和GPU集群系统上进行线性和非线性动力系统并行数值分析的核心知识。通过与行业合作伙伴的合作，PI有望为设计界带来立竿见影的影响，以提高纳米VLSI系统的设计生产率。研究成果还将帮助电子设计自动化(EDA)社区在探索当前和未来通用GPU方面获得更多洞察力，以便在GPU和多核系统上并行处理整个EDA工具。拟议的研究和相关培训的跨学科性质将使学生在竞争激烈的高科技就业市场获得关键技能。这笔赠款将使国际学生联合会能够雇佣更多的女性和未被充分代表的少数族裔学生，以进一步促进美国科技劳动力的多样性-S。

Parallel computing based on the general purpose Graphic Processing Unit (GPU) provide massive many-core parallelism and can deliver staggering performance improvements over traditional single-core and existing general multi-core computing techniques. The recent introduction of general-purpose GPU (GPGPU) has gained strong interests from the scientific community to tackle many computationally intensive problems. The GPU computing powers, however, have not been fully exploited for many important engineering computing problems in the VLSI design practices. Simulation of massive global interconnects, radio-frequency (RF) and millimeter-wave (MM) integrated circuits (ICs) at very high frequencies remain as difficult problems confronting chip designers. Designing new parallel and scalable computing algorithms, which can unleash the potentials of GPU-based parallel computing techniques, become highly desirable. This research seeks to investigate new parallel simulation approaches to solving massive interconnect circuits and analog/RF/MM integrated circuits based on single node general GPU or networked GPUs on a computer (GPU-cluster). First, the PI will investigate new parallel simulation algorithms based on analytic solution for structured interconnect circuits like on-chip power delivery and clock distribution networks on a GPU or GPU-cluster. Second, the PI proposes developing a very efficient numerical parallel simulation algorithm for analyzing general interconnects. The new algorithm will perform circuit complexity reduction to improve the efficiency. The PI?s team will investigate to parallelize the major computing steps in this method. Third, the PI plans to develop new parallel shooting-Newton methods for high-frequency circuits (RF/MM). The new method will explore structured Krylov-subspace, and GPU-based parallelization to improve efficiency as well as the convergence of RF/MM integrated circuit simulation. The outcome of this research will add significantly to the core knowledge of parallel numerical analysis of linear and nonlinear dynamic systems on the GPU and GPU-cluster systems. By working with the industry partner, the PI expects to bring immediate impacts on the design community to improve the design productivity for nanometer VLSI systems. The research results will also help the electronic design automation (EDA) community to gain more insight in exploring the current and future general-purpose GPUs for parallelizing entire EDA tools on GPUs and multicore systems. The interdisciplinary nature of proposed research and relevant training will allow students to gain critical skills in the highly competitive high-tech job market. This grant will enable the PI to hire more female and underrepresented minority students to further contribute to the diversity in America?s science and technology workforce.