CAREER: Design Automation and Circuits for Energy Efficient Computing using Resonant Clocking
职业:使用谐振时钟设计节能计算的自动化和电路
基本信息
- 批准号:1053838
- 负责人:
- 金额:$ 42.39万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2011
- 资助国家:美国
- 起止时间:2011-01-01 至 2016-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
This CAREER proposal aims to improve the energy efficiency of computer chips by developing circuits and automated design tools to recycle the energy in the power-hungry clock network that synchronizes events on most computer chips. Much like a hybrid car stores the kinetic energy during breaking into a battery for later use, the proposed resonant clocking stores the energy of the largest on-chip signal into on-chip inductors for later use. The proposed techniques combine knowledge from digital, analog, and radio-frequency (RF) circuit design and will integrate with existing low-power digital design methods and be manufactured using existing semiconductor processes. In addition to the circuits, the PI also proposes tools and design methods that will enable digital chip designers to easily include the proposed circuits by abstracting the previous broad knowledge base. This will accelerate the adoption of the proposed techniques for maximum pervasiveness and impact.The broader impact of the proposed research will be to increase power efficiency in computer chips and enable designers to include resonant clocks in chips ranging from mobile phones to large commercial servers. The previously unattainable power gains can then be used to improve battery lifetimes in mobile systems, decrease operational costs in commercial data centers, provide green computing by lessening the energy burden on our environment and improve computing performance which will enable new applications of computer systems. The PI will also pursue several educational and outreach efforts that focus on under-represented and under-privileged students in the local community through a series of seminars and summer internships.
这项CAREER提案旨在通过开发电路和自动化设计工具来提高计算机芯片的能效,以回收大多数计算机芯片上的高功耗时钟网络中的能量。就像混合动力汽车在电池中存储动能以备后用一样,所提出的谐振时钟将最大片上信号的能量存储到片上电感器中以备后用。所提出的技术联合收割机结合了来自数字、模拟和射频(RF)电路设计的知识,并将与现有的低功耗数字设计方法集成,并使用现有的半导体工艺制造。除了电路之外,PI还提出了工具和设计方法,使数字芯片设计人员能够通过抽象以前的广泛知识库来轻松地包括所提出的电路。这将加速所提出的技术的采用,以实现最大的普及性和影响力。所提出的研究的更广泛影响将是提高计算机芯片的功率效率,并使设计师能够在从移动的电话到大型商业服务器的芯片中包括谐振时钟。然后,先前无法达到的功率增益可以用于提高移动的系统中的电池寿命,降低商业数据中心中的运营成本,通过减轻对我们环境的能量负担来提供绿色计算,以及提高计算性能,这将使计算机系统的新应用成为可能。PI还将通过一系列研讨会和暑期实习,开展几项教育和外展工作,重点关注当地社区中代表性不足和贫困的学生。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Matthew Guthaus其他文献
Matthew Guthaus的其他文献
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{{ truncateString('Matthew Guthaus', 18)}}的其他基金
FuSe-TG: OpenBrain: Open-Source Cross-Layer Design of RRAM-based Neuromorphic Systems
FuSe-TG:OpenBrain:基于 RRAM 的神经形态系统的开源跨层设计
- 批准号:
2235440 - 财政年份:2023
- 资助金额:
$ 42.39万 - 项目类别:
Standard Grant
NSF Integrated Circuits Research, Education, and Workforce Development Workshop
NSF 集成电路研究、教育和劳动力发展研讨会
- 批准号:
2137629 - 财政年份:2021
- 资助金额:
$ 42.39万 - 项目类别:
Standard Grant
Collaborative Research: CI-ADDO-NEW: An Open Memory Array Compiler Framework to Support Devices, Circuits and Systems Research
合作研究:CI-ADDO-NEW:支持设备、电路和系统研究的开放式内存阵列编译器框架
- 批准号:
1205493 - 财政年份:2012
- 资助金额:
$ 42.39万 - 项目类别:
Standard Grant
REU Site: SURF-IT: Exploring Integrative System Design at UCSC
REU 网站:SURF-IT:探索 UCSC 的集成系统设计
- 批准号:
1156606 - 财政年份:2012
- 资助金额:
$ 42.39万 - 项目类别:
Standard Grant
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