Hocheffiziente CMOS-Schaltverstärkerstufen im Mikrowellenbereich
Hocheffiziente CMOS-Schaltverstärkerstufen im Mikrowellenbereich
批准号:
222284409
负责人:
Professor Dr.-Ing. Manfred Berroth
金额:
$0.0万
依托单位国家:
德国
项目类别:
Research Grants
财政年份:
2012
资助国家:
德国
项目状态:
已结题
起止时间:
2011-12-31 至 2014-12-31
中文摘要
目前射频功率放大器通常工作在ab类模式。在a类模式下效率为50%,在b类模式下效率可达到78%。ab类模式下的PA的效率介于两者之间。相比之下,有开关模式放大器,理论上可以达到100%的最大效率,因此似乎适用于宽带移动射频应用。本课题将开发一种高输出电压摆幅的cmos功率放大器,用于移动设备的无线电应用。具有陡坡的宽带开关模式放大器可用于不同形式的信号整形,例如脉冲宽度调制或δ -sigma调制相位调制,并且可以达到70%以上的非常高的功率效率。通过数字方式,开关模式放大器适用于所有频率范围,直至最高频率。由于缺少模拟元件,迁移到先进的cmos技术是容易的,并提高了产量。具有数字驱动器的堆叠mosfet的概念允许具有非常高带宽的高输出电压摆幅。由于输出电压的高摆幅,在相同的输出功率下可以减小输出电流。因此,降低了片上布线的电阻损耗和对阻塞电容器的要求。在本课题的第一部分,设计、构建并测量了一个带有数字驱动mosfet堆栈和3v输出电压摆幅的开关模式放大器。上升和下降时间为100ps,高带宽显示为高达3gbit /s的伪随机比特序列。通过模拟控制电压可以优化输出信号的形状。输入接口与具有电流模式逻辑的电路兼容。与已经设计好的电路一起使用是可能的。项目的第二部分追求以下目标:-数字控制逻辑取代模拟控制电压。-在项目的第一部分,无法直接确定堆叠mosfet的数字驱动器的延迟。应设计分析电路。用它可以确定所有驾驶信号的相对延迟。-从现有的3- v开关模式放大器出发,设计结构简单的6- v放大器。在相同的输出电流下,输出功率增加一倍。移动无线电信号的主要问题之一是峰值与平均功率比高。具有可调输出电压摆幅(1V, 2V, 3V)的放大器将大大提高放大移动无线电信号的效率。特别是后两个目标解决了当今移动通信中的重要问题,并显著提高了技术水平。
英文摘要
Nowadays radio frequency power amplifiers are usually working in class-AB mode. In class-A mode efficiencies of 50 %, in class-B mode efficiencies of 78 % can be reached. A PA in class-AB mode has an efficiency in between. In comparison there are switching mode amplifiers, which can reach in theory a maximum efficiency of 100 % and therefore seem applicable for broadband mobile radio frequency applications. In this project a CMOS-power amplifier with high output voltage swing for radio applications in mobile devices shall be developed. A broadband switching mode amplifier with sharp slopes can be used with different forms of signal shaping, for example with pulse-width-modulation or with a delta-sigma-modulated phase modulation, and can reach very high power efficiencies above 70 %. With the digital approach the switching mode amplifier is applicable for all frequency ranges up to a maximum frequency. Due to the missing analog components the migration to advanced CMOS-technologies is eased and the yield increases. The concept of stacked MOSFETs with a digital driver allows a high output voltage swing with very high bandwidth. Due to the high output voltage swing the output current can be reduced at the same output power. Hence the resistive losses of the wiring on chip and the requirements for the blocking capacitors are reduced. In the first part of this project a switching mode amplifier with a digitally driven MOSFET-stack and a 3-V-output voltage swing was designed, built and measured. The rise and fall times are 100 ps. The high bandwidth is shown with a pseudo random bit sequence up to 3 GBit/s. The output signal shape can be optimized by analog control voltages. The input interface is compatible to circuits with current mode logic. The use with already designed circuits is possible. The second part of the project pursues the following goals: -The analog control voltages shall be replaced by digital control logic. -The delays for the digital driver of the stacked MOSFETs cannot be determined directly in the first part of the project. An analysis circuit shall be designed. With it the relative delays of all driving signals can be determined. -Starting from the existing 3-V-switching mode amplifier a 6-V-amplifier with simple structure shall be designed. At the same output current the output power is doubled. -One of the main problems in mobile radio signals is the high peak to average power ratio. An amplifier with adjustable output voltage swing (1V, 2V, 3V) shall lead to a crucial increase of efficiency for amplifying mobile radio signals. Especially the latter two goals address important problems in todays mobile communications and they improve the state of the art significantly.
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