Electronic Analog Multiplexer for High-Speed Communication Systems (ELAMUR)

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The uninterrupted growth in data traffic in the global transmission networks requires increased bandwidths, especially in the optical networks. Due to the cost scaling with the number of optical channels, it is beneficial to maximize the data rate per optical channel, which requires an increase of the signal bandwidth for the single channel.This growing bandwidth imposes higher requirements on the electronics of the transmitter and the receiver. On the transmitter side, this applies in particular to the electronic digital-to-analog converters (DAC). The growing demand for bandwidth in transmitters has been satisfied with CMOS DACs in 65 to 28 nm technology in the past years. They provide conversion rates of 56 to 92 GS/s; however, it has been become apparent in the last years that the maximum conversion rate will hardly increase beyond 130 GS/s. Moreover, the output bandwidth will barely reach values far beyond 40 GHz, even in the latest CMOS technologies (e.g. 7 nm Fin-FET).Therefore, new circuit concepts are urgently needed to further increase the electrical bandwidth per channel. For this purpose, a pure electrical multiplex of several DAC output signals with an integrated circuit is desirable. The eligible techniques are frequency division multiplex and analog time division multiplex. Frequency division multiplex requires lumped mixers and high-Q analog filters, which are not well suited for a high level in integration. Solely, analog time division multiplex enables a single compact monolithic integrated chip, which combines several DAC output signals to a single signal. The applicants have already demonstrated an analog 2-to-1 multiplexer (AMUX) for baud rates up to 112 GBd in 2017.In this project, analog multiplexers with at least four inputs offering baud rates up to 200 GBd and signal bandwidths exceeding 100 GHz shall be researched and demonstrated. Different basic circuit topologies shall be investigated to find the best-suited circuit configuration regarding bandwidth and signal quality. The circuit shall be transferred into a layout and manufactured in the bipolar technology SG13G2 of IHP. The sources of linear and nonlinear distortion inside the circuit shall be identified and embedded into a behavioral model. Appropriate linear and nonlinear methods for signal pre-distortion shall be identified, investigated and implemented. With a commercial four-channel signal generator, the demonstrator IC and the designed signal pre-distortion, electrical signals of high quality with bandwidth up to 100 GHz and symbol rate up to 200 GBd shall be demonstrated. Furthermore, the broadband signal will be transmitted over an optical link.