Design of Circuits and Systems for Nonvolatile Nanomagnetic Logic

非易失性纳米磁逻辑电路和系统设计

基本信息

项目摘要

Nanomagnetic logic (NML), is composed of nanomagnetic dots interacting by magnetic field coupling, and thus is a non charge-based beyond CMOS technology. It can provide exceptionally dense, robust and low power integrated systems without leakage current. The availability of nonvolatile logic states enables instant on/off capability as well as new architectures and functionalities. In our current DFG project "Field-coupled circuits in magnetic multilayers" (2009-2012), different from most other groups we have explored a technology for NML that uses nanomagnets with perpendicular, out-of-plane magnetization. This gives rise to a robust and precisely controllable switching behavior, more degrees of freedom in shape and arrangement of the magnets, and finally a denser layout. As starting point for the renewal project, we have now a processing technology, where we can set the switching threshold of single dots and the direction of signal flow in chains and logic blocks. We have experimentally verified models describing the dependencies between technology parameters, geometry and switching behavior. Further we have demonstrated the basic logic functions of inverter, fan-out and majority gate, where we use a global magnetic field as clock and as energy supply. Now it is time to look further towards more complex circuits and complete system architectures. For that purpose we want to develop a SPICE-like device model for the magnetization of single dots and the dynamics of their coupling with neighbouring dots under action of the clocking field, as well as behavioral models to be used for larger system simulation. With this, we will design clocking and synchronization schemes, including buffer circuits corresponding to CMOS flipflops. The generation of the external clocking fields and their influence on the circuit behaviour will also be investigated and optimized. In addition, we want to use our existing models and measurement data to calculate error rates resulting from non-ideal technological manufacturing processes and thermal noise, and investigate methods for robust design as well as possible error correction schemes.As a completely new approach, we propose to use vertical field coupling in the z-direction for creation of true 3D integrated circuits and systems. This offers, when using several functional layers, a very high packing density and very flexible architectures. This proposal is based upon successful pilot experiments in our own technology. With this and also with the conventional 2D arrangement, we want to design larger systems, mainly an arithmetic logic unit and FPGAs. Those profit a lot from NML due to the inherent nonvolatility and programmability during operation, and especially from the 3D integration, where an extra layer can be used for the programming function.
纳米磁逻辑(NML)是由纳米磁点通过磁场耦合相互作用而组成的,因此是一种超越CMOS的非电荷基技术。它可以提供非常密集,坚固和低功耗的集成系统,没有泄漏电流。非易失性逻辑状态的可用性支持即时开/关功能以及新的架构和功能。在我们目前的DFG项目“磁性多层中的场耦合电路”(2009-2012)中,与大多数其他小组不同,我们探索了一种用于NML的技术,该技术使用垂直的、面外磁化的纳米磁铁。这就产生了一个强大的和精确可控的开关行为,更多的自由度在形状和磁体的安排,并最终密集的布局。作为更新项目的起点,我们现在有了一种处理技术,我们可以设置单点的开关阈值和信号流在链和逻辑块中的方向。我们通过实验验证了描述技术参数、几何形状和开关行为之间依赖关系的模型。此外,我们还演示了逆变器,扇出和多数门的基本逻辑功能,其中我们使用全局磁场作为时钟和能量供应。现在是时候进一步研究更复杂的电路和完整的系统架构了。为此,我们希望开发一个类似spice的设备模型,用于单点的磁化和它们在时钟场作用下与邻近点的耦合动力学,以及用于更大系统仿真的行为模型。在此基础上,我们将设计时钟和同步方案,包括与CMOS触发器对应的缓冲电路。外部时钟场的产生及其对电路性能的影响也将被研究和优化。此外,我们希望利用现有的模型和测量数据来计算由非理想的工艺制造过程和热噪声引起的错误率,并研究稳健设计的方法以及可能的误差校正方案。作为一种全新的方法,我们建议在z方向上使用垂直场耦合来创建真正的3D集成电路和系统。当使用多个功能层时,这提供了非常高的封装密度和非常灵活的架构。这个建议是基于我们自己技术的成功试点实验。利用这种方法以及传统的二维布局,我们希望设计更大的系统,主要是一个算术逻辑单元和fpga。由于NML在操作过程中固有的非易变性和可编程性,特别是3D集成,其中额外的一层可用于编程功能,这些公司从NML中获益良多。

项目成果

期刊论文数量(5)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Signal crossing in perpendicular nanomagnetic logic
垂直纳米磁逻辑中的信号交叉
  • DOI:
    10.1063/1.4863810
  • 发表时间:
    2014
  • 期刊:
  • 影响因子:
    3.2
  • 作者:
    I. Eichwald;S. Breitkreutz;J. Kiermaier;G. Csaba;D. Schmitt-Landsiedel;M. Becherer
  • 通讯作者:
    M. Becherer
Domain wall depinning from notches using combined in- and out-of-plane magnetic fields
  • DOI:
    10.1063/1.4944698
  • 发表时间:
    2016-05-01
  • 期刊:
  • 影响因子:
    1.6
  • 作者:
    Goertz, Jelle J. W.;Ziemys, Grazvydas;Gamm, Stephan Breitkreutz-V.
  • 通讯作者:
    Gamm, Stephan Breitkreutz-V.
Experiment-based thermal micromagnetic simulations of the magnetization reversal for ns-range clocked nanomagnetic logic
基于实验的纳秒级时钟纳米磁逻辑磁化反转热微磁模拟
  • DOI:
    10.1063/1.4974021
  • 发表时间:
    2017
  • 期刊:
  • 影响因子:
    1.6
  • 作者:
    G. Žiemys;S. Breitkreutz von Gamm;G. Csaba;D Schmitt-Landsiedel;M. Becherer
  • 通讯作者:
    M. Becherer
Majority logic gate for 3D magnetic computing
  • DOI:
    10.1088/0957-4484/25/33/335202
  • 发表时间:
    2014-08-22
  • 期刊:
  • 影响因子:
    3.5
  • 作者:
    Eichwald, Irina;Breitkreutz, Stephan;Becherer, Markus
  • 通讯作者:
    Becherer, Markus
Characterization of the magnetization reversal of perpendicular Nanomagnetic Logic clocked in the ns-range
  • DOI:
    10.1063/1.4944336
  • 发表时间:
    2016-03
  • 期刊:
  • 影响因子:
    1.6
  • 作者:
    G. Ziemys;C. Trummer;S. B. Gamm;I. Eichwald;D. Schmitt-Landsiedel;M. Becherer
  • 通讯作者:
    G. Ziemys;C. Trummer;S. B. Gamm;I. Eichwald;D. Schmitt-Landsiedel;M. Becherer
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Professorin Dr. Doris Schmitt-Landsiedel其他文献

Professorin Dr. Doris Schmitt-Landsiedel的其他文献

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{{ truncateString('Professorin Dr. Doris Schmitt-Landsiedel', 18)}}的其他基金

Analog circuits with time varying parameters caused by device aging and gate currents: modelling of impact on circuit behaviour; assessment and development of countermeasures.
由器件老化和栅极电流引起的参数随时间变化的模拟电路:对电路行为影响的建模;
  • 批准号:
    191845808
  • 财政年份:
    2011
  • 资助金额:
    --
  • 项目类别:
    Research Grants
3D Integration of Nonvolatile Nanomagnetic Logic
非易失性纳米磁性逻辑的 3D 集成
  • 批准号:
    114933698
  • 财政年份:
    2009
  • 资助金额:
    --
  • 项目类别:
    Research Grants
Kompensation von On-Chip Parameterschwankungen durch lokale Spannungsanpassung aufgrund von in-situ Verzögerungsmessungen in integrierten CMOS Schaltungen
基于集成 CMOS 电路中的原位延迟测量,通过本地电压调整来补偿片上参数波动
  • 批准号:
    72373842
  • 财政年份:
    2008
  • 资助金额:
    --
  • 项目类别:
    Research Grants
Senkung der Verlustleistung in energierückgewinnender Logik durch abschaltbare Spannungsversorgung
通过可开关电源减少能量恢复逻辑中的功率损耗
  • 批准号:
    60699735
  • 财政年份:
    2007
  • 资助金额:
    --
  • 项目类别:
    Research Grants
Der Tunneltransistor in matrixförmigen Schaltungen und Sensoren
矩阵电路和传感器中的隧道晶体管
  • 批准号:
    5272596
  • 财政年份:
    2000
  • 资助金额:
    --
  • 项目类别:
    Research Units
Zentrale Dienste
中央服务
  • 批准号:
    5272664
  • 财政年份:
    2000
  • 资助金额:
    --
  • 项目类别:
    Research Units
Niederohmige, elektromigrationsfeste Silberstrukturen für die Mikroelektronik
用于微电子学的低电阻、抗电迁移银结构
  • 批准号:
    5272462
  • 财政年份:
    2000
  • 资助金额:
    --
  • 项目类别:
    Research Units
Analysis and optimization of parametric yield for low-power circuits
低功耗电路参数良率分析与优化
  • 批准号:
    5173702
  • 财政年份:
    1999
  • 资助金额:
    --
  • 项目类别:
    Priority Programmes

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