SHF: Small: Efficient In-Memory Computing Architecture Based on RRAM Crossbar Arrays

处理器和内存分开的传统数字计算机在今天面临着越来越大的挑战？S？大数据？由于数据在处理器和内存之间的持续移动会导致显著的延迟和能源消耗。这一问题被称为冯·诺伊曼瓶颈，影响了图像和视频处理等复杂任务的性能，以及对高速和低功耗至关重要的嵌入式应用程序(如分布式传感器网络)的性能。该项目旨在开发一种基于新兴的阻性随机存取存储器(RRAM)交叉开关阵列的新的计算机体系结构，其中存储器和逻辑功能存在于相同的物理位置，并且通过直接读出给定操作的存储输出在物理存储器中实现计算。通过利用新兴设备的独特特性和新的计算体系结构，该项目将深刻推动纳米设备和计算机体系结构研究的前沿，并为从服务器到物联网(IoT)的各种应用实现高速和低功耗计算。该项目将对研究界和半导体行业产生重大影响，同时为研究生和本科生提供跨学科培训，并吸引不同层次和背景的学生广泛参与合作研究和教育。该方法充分利用了RRAM阵列的高存储密度、非易失性和随机访问能力。当RRAM器件受到编程或重置脉冲时，RRAM器件基于电阻变化来操作。因此，电阻不仅存储信息，而且直接调节电路中的信息(即电流)流动，从而同时实现存储和逻辑功能。以前对基于RRAM的电路的研究主要集中在软计算任务上，在这种任务中，环境和任务都很复杂，但可以容忍不准确和近似。该项目旨在开发一种计算系统，可以使用RRAM交叉开关阵列高效地执行精确的算术运算。该系统将针对吞吐量和能量进行优化，并使用制造的高密度RRAM阵列进行实验演示，同时开发用于设计自动化的工具包。

Conventional digital computers, with separate processor and memory, face increasing challenges in today?s ?big data? era as the constant movement of data between the processor and the memory causes significant delay and energy consumption. This problem, termed the ?von Neumann bottleneck?, affects performance for both complex tasks such as image and video processing as well as embedded applications such as distributed sensor networks where high speed and low power are critical. This project aims to develop a new computer architecture based on emerging resistive random access memory (RRAM) crossbar arrays, where the memory and logic functions exist at the same physical locations and computation is achieved in the physical memory by directly reading out stored outputs for a given operation. By leveraging the unique properties of emerging devices with a new computation architecture, this project will profoundly advance the frontier of nanoscale device and computer architecture research, and enable high-speed and low-power computation for applications ranging from servers to Internet of Things (IoTs). This program will have significant impact on the research community and the semiconductor industry, while providing interdisciplinary training of graduate and undergraduate students, and draw broad participation of students of different levels and backgrounds in collaborative research and education.This approach takes full advantage of the high-storage density, non-volatility, and random-access capabilities of RRAM arrays. RRAM devices operate based on the resistance change when the device is subjected to a programming or reset pulse. Consequently, the resistance not only stores information but also directly regulates information (i.e. current) flow in the circuit, thus implementing both memory and logic functions simultaneously. Previous studies on RRAM-based circuits focus on soft computing tasks where the environment and the tasks are complex but inaccuracies and approximations are tolerated. This project aims to develop a computing system that can perform accurate arithmetic operations efficiently using RRAM crossbar arrays. The system will be optimized for throughput and energy, and experimentally demonstrated using fabricated high-density RRAM arrays, along with the development of a toolset for design automation.