SHF: Small: Efficient In-Memory Computing Architecture Based on RRAM Crossbar Arrays

传统的数字计算机，与单独的处理器和存储器，面临着越来越多的挑战，在今天？是什么？大数据？因为数据在处理器和存储器之间的不断移动导致显著的延迟和能量消耗。这个问题，被称为？冯·诺依曼瓶颈？影响复杂任务（如图像和视频处理）以及嵌入式应用（如高速和低功耗至关重要的分布式传感器网络）的性能。该项目旨在开发一种基于新兴的电阻式随机存取存储器（RRAM）交叉阵列的新计算机架构，其中存储器和逻辑功能存在于相同的物理位置，并且通过直接阅读给定操作的存储输出来在物理存储器中实现计算。通过利用具有新计算架构的新兴设备的独特特性，该项目将深刻推进纳米级设备和计算机架构研究的前沿，并为从服务器到物联网（IoT）的应用提供高速和低功耗计算。该计划将对研究界和半导体行业产生重大影响，同时为研究生和本科生提供跨学科的培训，并吸引不同层次和背景的学生广泛参与合作研究和教育。这种方法充分利用了RRAM阵列的高存储密度，非易失性和随机存取能力。RRAM器件基于当器件经受编程或复位脉冲时的电阻变化来操作。因此，电阻不仅存储信息，而且还直接调节电路中的信息（即电流）流动，从而同时实现存储器和逻辑功能。以往的研究基于随机存取存储器的电路集中在软计算任务的环境和任务是复杂的，但不准确和近似是可以容忍的。本项目旨在开发一种计算系统，可以使用RRAM交叉阵列有效地执行精确的算术运算。该系统将优化的吞吐量和能源，实验证明使用制造的高密度RRAM阵列，随着沿着的设计自动化工具集的发展。

Conventional digital computers, with separate processor and memory, face increasing challenges in today?s ?big data? era as the constant movement of data between the processor and the memory causes significant delay and energy consumption. This problem, termed the ?von Neumann bottleneck?, affects performance for both complex tasks such as image and video processing as well as embedded applications such as distributed sensor networks where high speed and low power are critical. This project aims to develop a new computer architecture based on emerging resistive random access memory (RRAM) crossbar arrays, where the memory and logic functions exist at the same physical locations and computation is achieved in the physical memory by directly reading out stored outputs for a given operation. By leveraging the unique properties of emerging devices with a new computation architecture, this project will profoundly advance the frontier of nanoscale device and computer architecture research, and enable high-speed and low-power computation for applications ranging from servers to Internet of Things (IoTs). This program will have significant impact on the research community and the semiconductor industry, while providing interdisciplinary training of graduate and undergraduate students, and draw broad participation of students of different levels and backgrounds in collaborative research and education.This approach takes full advantage of the high-storage density, non-volatility, and random-access capabilities of RRAM arrays. RRAM devices operate based on the resistance change when the device is subjected to a programming or reset pulse. Consequently, the resistance not only stores information but also directly regulates information (i.e. current) flow in the circuit, thus implementing both memory and logic functions simultaneously. Previous studies on RRAM-based circuits focus on soft computing tasks where the environment and the tasks are complex but inaccuracies and approximations are tolerated. This project aims to develop a computing system that can perform accurate arithmetic operations efficiently using RRAM crossbar arrays. The system will be optimized for throughput and energy, and experimentally demonstrated using fabricated high-density RRAM arrays, along with the development of a toolset for design automation.