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Study on Advanced Environment for VLSI System Design Education in Universities

高校超大规模集成电路系统设计教育先进环境研究

基本信息

批准号：
06302074
负责人：
NANYA Takashi
金额：
$ 10.43万
依托单位：
Tokyo Institute of Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Co-operative Research (A)
财政年份：
1994
资助国家：
日本
起止时间：
1994 至 1995
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-06302074/
关键词：
VLSI chip implementation service Multi-project chip Gate arrays Full custom LSI VLSI Design Education

项目摘要

With the aim of establishing a VLSI chip implementation service which supports an advanced environment of VLSI system disign education and research in Japanese universities, we conducted a pilot project to simulate multi-project-chip design and fabrication service system in order to identify any technical and economical problems encountered by the users of this system and chip foundries. In the pilot project, NTT Electronics Technology, Inc.has undertaken to play the role of the chip foundry and the multiproject chip broker.In 1994, eight universities submitted LSI design data in Verilog netlist description to NEL to implement them with a 0.5 micron CMOS gate array technology.In 1995,14 research groups from 11 universities submitted full custom designs in the stream data format to implement them as a single multi-project chip with a 0.8 microm analog CMOS technology. Another fabrication experiment with the gate array implementation was also done under the same condition as the 1994 experiment.Many problems which must be solved were indentified during the design and fabrication process for both the gate array implementation and the full custom LSI implementation. The issues which have been recognized to require further discussions towards the realization of an advanced environment for VLSI design education include ; cooperation with CAD vendors, maintenance of CAD tools, cooperation with foundries, technology update, design library, network environment, education program, staff training, publicity, and others.

为了在日本大学建立一个支持VLSI系统设计教育和研究的先进环境的VLSI芯片实现服务，我们进行了一个试验项目，模拟多项目芯片设计和制造服务系统，以确定该系统的用户和芯片制造商遇到的任何技术和经济问题。NTT Electronics Technology，Inc.在试点项目中承担了芯片代工厂和多项目芯片代理商的角色。1994年，8所大学向NEL提交了Verilog网表描述的LSI设计数据，以采用0.5微米CMOS门阵列技术实现这些设计。1995年，来自11所大学的14个研究小组提交了流数据格式的完全定制设计，以将其实现为具有0.8微米模拟CMOS技术的单个多项目芯片。在与1994年实验相同的条件下进行了另一次门阵列实现的制作实验，找出了门阵列实现和全定制LSI实现在设计和制作过程中需要解决的许多问题。已经认识到需要进一步讨论的问题，以实现一个先进的环境，超大规模集成电路设计教育包括：与CAD供应商的合作，CAD工具的维护，与代工厂的合作，技术更新，设计库，网络环境，教育计划，员工培训，宣传，和其他。