Fabrication of InP-based high-speed integrated circuits using MESFETs with high Schottky barrier height

使用具有高肖特基势垒高度的 MESFET 制造 InP 基高速集成电路

基本信息

批准号：
07555093
负责人：
HASHIZUME Tamotsu
金额：
$ 3.07万
依托单位：
HOKKAIDO UNIVERSITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
1995
资助国家：
日本
起止时间：
1995 至 1996
项目状态：
已结题

项目摘要

The purpose of this study is to realize Schottky contacts with high barrier height to n-InP by a novel in-situ electrochemical process and to apply this Schottky gate technology to fabrication InP MESFETs and related high-speed integrated circuits and optoelectronic integrated circuits. The main results obtained are listed below :(1) A novel in-situ electrochemical process enables us to produce Pt/n-InP Schottky diodes with a barrier height of 0.86eV or higher and n-value of 1.1 or lower.(2) Capacitance-voltage measurements, Raman spectroscopy and X-ray photoelectron spectroscopy revealed that the Pt/InP interfaces without stress and transition layr including oxides were obtained by the novel electrochemical process.(3) By use of this novel Schottky gate formation process, Pt-gate n-InP MESFETs were successfully fabricated. The fabricated MESFETs exhibited good gate control of drain current as well as pinch-off behavior. The maximum transconductance of 23 mS and the minimum gate leakage current of 100nA at Vg=-5V were obtained. Furthermore, the Pt Schottky gate can control the drain current even under the positive gate voltage condition, indicating a possibility of enhancement-mode operation.(4) High Schottky barrier heights of 0.9eV and 0.5eV were obtained for n-InAlAs and n-InGaAs materials, respectively, by electrochemical deposition of Pt. These results are very attractive for gate formation on InAlAs/InGaAs high electron mobility transistor (HEMT) structures.

这项研究的目的是通过一种新型的原位电化学过程实现Schottky的接触，并将这种Schottky Gate技术应用于制造INP MESFET和相关的高速集成电路和光电集成电路。 The main results obtained are listed below :(1) A novel in-situ electrochemical process enables us to produce Pt/n-InP Schottky diodes with a barrier height of 0.86eV or higher and n-value of 1.1 or lower.(2) Capacitance-voltage measurements, Raman spectroscopy and X-ray photoelectron spectroscopy revealed that the Pt/InP interfaces without stress and transition通过新型的电化学过程获得了包括氧化物的Layr。（3）通过使用这种新型Schottky Gate形成过程，PT-GATE N-INP MESFET成功地制造出来。制造的MESFET表现出良好的排水电流和捏合行为的门控制。获得了23毫秒的最大跨导率，并获得了Vg = -5V时100NA的最小闸门泄漏电流。此外，即使在正门电压条件下，PT Schottky门也可以控制漏极电流，这表明可能通过电化学材料获得了N-Ninalas和N- ingaas材料的高肖特基屏障高度为0.9EV和0.5EV。这些结果对于在Inalas/Ingaas高电子迁移式晶体管（HEMT）结构上形成栅极非常有吸引力。