Fabrication of InP-based high-speed integrated circuits using MESFETs with high Schottky barrier height

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The purpose of this study is to realize Schottky contacts with high barrier height to n-InP by a novel in-situ electrochemical process and to apply this Schottky gate technology to fabrication InP MESFETs and related high-speed integrated circuits and optoelectronic integrated circuits. The main results obtained are listed below :(1) A novel in-situ electrochemical process enables us to produce Pt/n-InP Schottky diodes with a barrier height of 0.86eV or higher and n-value of 1.1 or lower.(2) Capacitance-voltage measurements, Raman spectroscopy and X-ray photoelectron spectroscopy revealed that the Pt/InP interfaces without stress and transition layr including oxides were obtained by the novel electrochemical process.(3) By use of this novel Schottky gate formation process, Pt-gate n-InP MESFETs were successfully fabricated. The fabricated MESFETs exhibited good gate control of drain current as well as pinch-off behavior. The maximum transconductance of 23 mS and the minimum gate leakage current of 100nA at Vg=-5V were obtained. Furthermore, the Pt Schottky gate can control the drain current even under the positive gate voltage condition, indicating a possibility of enhancement-mode operation.(4) High Schottky barrier heights of 0.9eV and 0.5eV were obtained for n-InAlAs and n-InGaAs materials, respectively, by electrochemical deposition of Pt. These results are very attractive for gate formation on InAlAs/InGaAs high electron mobility transistor (HEMT) structures.