Investigation on Pileup of Arsenic and Antimony Ion-implanted into Silicon

Systematic evaluation on depth profiles and electrical characteristics of Sb - D1+ e - D1 or As - D1+ e - D1implanted layer were carried out for various ion implantation conditions and annealing conditions. .The obtained quantitative data will be a base to construct The models to describe behavior of The我们提倡Sb pileup model that Sb is transported byrecrystallization caused by annealing in an amorphized layer produced by Sb - ionrelatively low temperature（800-900℃）RTA （Rapid Thermal Processing）Sb pileup is suppressed. In the case of As，RTA不effective for the pileup suppression. Sheet resistance of Sb implanted layer wasimproved by using RTA and increasing Sb dose to 500Ω /sq. maintaining junction depth around20 nm。

Systematic evaluation on depth profiles and electrical characteristics of SbィイD1+ィエD1 or AsィイD1+ィエD1 implanted layer were carried out for various ion implantation conditions and annealing conditions. The obtained quantitative data will be a base to construct the models to describe behavior of the dopants during annealing. We proposed the Sb pileup model that Sb is transported by recrystallization caused by annealing in an amorphized layer produced by SbィイD1+ィエD1 ion implantation. By relatively low temperature (800-900 ℃) RTA (Rapid Thermal Processing), Sb pileup is suppressed. In the case of As, RTA was not effective for the pileup suppression. Sheet resistance of Sb implanted layer was improved by using RTA and increasing SbィイD1+ィエD1 dose to 500 Ω/sq. maintaining junction depth around 20 nm.