Silicon Resonant Tunnelling Diodes and Circuits

硅谐振隧道二极管和电路

• 批准号: EP/G038961/1
• 负责人: Douglas Paul
• 金额: $ 57.5万
• 依托单位: University of Glasgow
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2009
• 资助国家: 英国
• 起止时间: 2009 至 无数据
• 项目状态: 已结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FG038961%2F1
• 关键词: Silicon; Resonant; Tunnelling; Diodes; Circuits

Resonant tunnelling diodes (RTDs) are one of the few quantum device technologies which has made production with superior performance compared to rival devices and circuits. All such circuits have been in III-V technology while over 98% of microelectronic sales are silicon devices. Previous work at Cambridge has demonstrated III-V type performance from Si/SiGe RTDs. This proposal is to develop and demonstrate basic circuits using Si/SiGe RTDs combined with strained-Si MOSFETs, a key step required if such technology is to make the leap to production. One application will be investigated as a demonstrator, that of tunnelling static random access memory (TSRAM). The TSRAM has the ability to be integrated with future CMOS microprocessors using strained-Si technology, hence the inclusion in the International Technology Roadmap for Semiconductors (ITRS) of RTD technology. In particular the TSRAM potentially offers 7 orders of magnitude improvement in CMOS SRAM standby power dissipation, now one of the most important parameters in the future scaling of CMOS microprocessors. We also propose to develop existing outreach teaching resources on Moore's law, scaling and post Moore devices to encourage children into science and the U.K. semiconductor industry linked to the proposed research.The work we propose is also aligned with the EPSRC Signposted Grand Challenges in Silicon Technology as set out by the U.K. EPSRC Silicon Futures network (GR/T07879). This particular proposal to some degree straddles all the Technology Grand Challenges but the change of device architecture to RTDs with ~2 nm critical dimensions is most strongly aligned to the G1: Novel Devices and Processes Using Silicon Based Technology. This proposal will develop and validate quantum device models of RTDs (G2.2) and use numerous characterisation techniques at the nm scale (G3). The RTD technology is using SiGe and so we are addressing G4: New Materials Systems for Silicon Based Technologies. As standby power dissipation is also reduced by 7 orders of magnitude compared to SRAM, this is also aligned with the G7 Eco-silicon Grand Challenge and the many potential applications for a successful technology especially with DAC and ADC circuits has strong associations with the G6 Silicon for Life Grand Challenge.

共振隧穿二极管（RTD）是少数几种量子器件技术之一，与竞争对手的器件和电路相比，它使产品具有上级性能。所有这些电路都采用III-V技术，而微电子销售的98%以上是硅器件。剑桥先前的工作已经证明了Si/SiGe RTD的III-V型性能。该提案旨在开发和演示使用Si/SiGe RTD与应变Si MOSFET相结合的基本电路，这是此类技术实现生产飞跃所需的关键一步。一个应用程序将被调查作为一个示范，隧道静态随机存取存储器（TSRAM）。TSRAM具有与使用应变硅技术的未来CMOS微处理器集成的能力，因此RTD技术被列入国际半导体技术路线图（ITRS）。特别是TSRAM可能提供7个数量级的改善CMOS SRAM待机功耗，现在的CMOS微处理器的未来缩放的最重要的参数之一。我们还建议开发现有的关于摩尔定律、缩放和后摩尔装置的外展教学资源，以鼓励儿童进入科学和英国。我们提出的工作也符合EPSRC Signposted Grand Challenges in Silicon Technology（EPSRC标志性的硅技术大挑战）的要求，EPSRC硅期货网络（GR/T07879）。这个特殊的建议在某种程度上跨越了所有的技术大挑战，但器件架构的变化，以RTD与~2纳米的关键尺寸是最强烈的对齐G1：新的设备和工艺，使用硅基技术。该提案将开发和验证RTD的量子器件模型（G2.2），并在纳米级（G3）使用多种表征技术。RTD技术使用SiGe，因此我们正在解决G4：硅基技术的新材料系统。与SRAM相比，待机功耗也降低了7个数量级，这也符合G7生态硅大挑战，并且成功技术的许多潜在应用，特别是DAC和ADC电路，与G6生命硅大挑战有着密切的联系。

项目成果

SPICE Modeling of the Scaling of Resonant Tunneling Diodes and the Effects of Sidewall Leakage

• DOI: 10.1109/ted.2012.2219867
• 发表时间: 2012-10
• 期刊: IEEE Transactions on Electron Devices
• 影响因子: 3.1
• 作者: G. Ternent;D. Paul

Silicon nanowire devices with widths below 5 nm

宽度小于5纳米的硅纳米线器件

• DOI: 10.1109/nano.2012.6322005
• 发表时间: 2012
• 作者: Mirza M

Scaling resonant tunnelling diodes and nanowires using SPICE modelling to optimise nanoscale performance

使用 SPICE 建模缩放谐振隧道二极管和纳米线以优化纳米级性能

• DOI: 10.1109/nano.2012.6322050
• 发表时间: 2012
• 作者: Ternent G

Si/SiGe Tunneling Static Random Access Memories

Si/SiGe 隧道静态随机存取存储器

• DOI: 10.1149/05009.0987ecst
• 发表时间: 2013
• 期刊: ECS Transactions
• 作者: Ternent G