Tunnel epitaxy: building a buffer-less III-V-on-insulator (XOI) platform for on-chip light sources

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The past few decades have witnessed an explosive growth in the semiconductor material and device technologies and their profound impact in the shaping of modern society. After experiencing the booming development of personal computer (PC) technology in the 1990s and the upsurge of the Internet in the 2000s, we are embracing a new age of the Internet of Things. As the explosive growth of Internet Protocol (IP) traffic is driving data centres to the so-called "Zettabyte Era", today's electrical interconnects quickly became the bottleneck due to ohmic loss and RC delays of copper wires. Optical interconnects promise to break the bottleneck by enabling data in computers moving both across chips and from chip to chip through photons. Photons are electromagnetic waves with very high frequencies. They can travel at the speed of light and they are super-efficient information carriers. The realisation of optical interconnects requires all optical components from passive to active devices to be integrated on the same silicon-on-insulator platform. Despite great success in developing silicon-based light modulation and detection, the lack of an efficient light emitter due to the indirect bandgap properties of silicon continues to pose a major roadblock. In contrast to silicon, most of III-V compound semiconductors have a direct bandgap with excellent photon absorption and emission efficiency. It is widely perceived that integrating III-V semiconductors, the best available materials for light emitters, on silicon could unpin the transition from electrical to optical interconnects.Epitaxial growth of III-V materials in the desired areas on silicon offers a scalable, low-cost and high-throughput scheme to bring optical capabilities to silicon integrated circuits. However, there are several fundamental challenges associated with material incompatibility, including a large mismatch in the lattice constants and thermal expansion coefficients, and the growth of polar materials on non-polar substrates. Conventional III-V/Si epitaxy circumvents these challenges through multiple buffer layers on bulk silicon wafers. However, thick buffers limit process throughput and present a big barrier for efficient light coupling to the underlying silicon waveguides. In this project, an advanced epitaxy process will be developed to enable an III-V on insulator (XOI) structure integrated on silicon wafers. By taking advantage of the crystallographic geography and selective area growth in confined spaces, we aim to achieve dislocation-free micro-sized thin films on insulators without requesting complex buffer designs. Such a buffer-less platform can potentially support intimate integration of III-V compound semiconductors with silicon waveguides and open enormous opportunities in Si photonics. As a proof-of-concept demonstration, micro-disk lasers will be fabricated to validate the optical quality of the III-V structures and highlight its potential for photonics integration.