Reliability-Aware Design of Systems on Chip (SoCs)

片上系统 (SoC) 的可靠性感知设计

• 批准号: 555744-2020
• 负责人: Ivanov, Andre
• 金额: $ 7.96万
• 依托单位: University of British Columbia
• 依托单位国家: 加拿大
• 项目类别: Alliance Grants
• 财政年份: 2020
• 资助国家: 加拿大
• 起止时间: 2020-01-01 至 2021-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=706090
• 关键词: Reliability; Aware; Design; Systems; Chip

The world is seeing a relentless penetration of smart devices and systems that fuel applications in all of the world's economic sectors, and all of the world's built and natural environments and beyond (outer space). Semiconductor devices (transistors) constitute the building blocks of integrated circuits (ICs) and systems on chip (SoCs) that, in turn, form the underlying technology that enables this formidable deployment. CMOS refers to the semiconductor fabrication technology used for the vast majority of electronic-based systems deployed today and projected to remain for years to come. The CMOS fabrication technology has been on a scaling (down) trajectory for decades, allowing for ever increasing transistor counts and yielding ever increasing system performance (speed) and capability. The reliability of transistors has always been a factor for consideration for IC manufacturers and system integrators. However, this reliability consideration is now reaching unprecedented levels of importance and challenge. The reasons are twofold: 1) a multitude of new(er) products are required to maintain a guaranteed level of performance over extended periods of time (years or decades) in possibly harsh environments, e.g., automotive, communications infrastructure, internet of things (IOT); 2) the ageing (performance deterioration over time) mechanisms that emerge as CMOS continues to scale are growing in relative importance (impact) and complexity. This project addresses these two factors and aims to provide solutions to meet higher reliability requirements in light of the more complex and ill-understood failure mechanisms. Our efforts will benefit IC manufacturers, and, most importantly, organizations (e.g., Huawei) where IC and system designers face increasingly significant reliability challenges. Canada has a large number of companies focused on the design of ICs for a multitude of applications. The outcomes of this project will benefit all such companies by allowing them to more economically and rapidly meet reliability requirements, thereby augmenting their competitiveness.

世界正在看到智能设备和系统的无情渗透，这些设备和系统推动了世界所有经济部门以及世界所有建筑和自然环境以及其他领域（外层空间）的应用。 半导体器件（晶体管）构成了集成电路（IC）和片上系统（SoC）的构建模块，而这些模块又形成了实现这种强大部署的基础技术。 CMOS是指用于当今部署的绝大多数电子系统的半导体制造技术，预计将在未来几年内继续使用。 几十年来，CMOS制造技术一直处于按比例缩小（缩小）的轨道上，允许不断增加晶体管数量，并产生不断增加的系统性能（速度）和能力。 晶体管的可靠性一直是IC制造商和系统集成商考虑的因素。然而，这种可靠性考虑现在达到了前所未有的重要性和挑战水平。原因有二：1）需要大量新的（较新的）产品以在可能恶劣的环境中在延长的时间段（数年或数十年）内保持有保证的性能水平，例如，汽车、通信基础设施、物联网（IOT）; 2）随着CMOS持续扩展而出现的老化（性能随时间恶化）机制的相对重要性（影响）和复杂性正在增加。该项目解决了这两个因素，旨在提供解决方案，以满足更高的可靠性要求，在更复杂和更难理解的故障机制。 我们的努力将使IC制造商受益，最重要的是，组织（例如，IC和系统设计人员面临着日益严峻的可靠性挑战。加拿大有大量的公司专注于为多种应用设计IC。该项目的成果将使所有这些公司受益，使它们能够更经济、更迅速地满足可靠性要求，从而增强其竞争力。