High-Performance Hardware-Accelerated Private Computation
高性能硬件加速私有计算
基本信息
- 批准号:RGPIN-2020-05807
- 负责人:
- 金额:$ 3.35万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Discovery Grants Program - Individual
- 财政年份:2020
- 资助国家:加拿大
- 起止时间:2020-01-01 至 2021-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Fully homomorphic encryption (FHE) is a way of encrypting data that enables users to perform an arbitrary sequence of operations, such as addition or multiplication, on the data without having to decrypt to do so. The capacity to compute on encrypted data is extremely useful, as it allows for services to be performed on sensitive personal data on an untrusted cloud-based machine without ever compromising either the security or privacy of the data during. Performing the mathematical operations using the underlying lattice-based mathematics uses a great deal of compute time and memory. Until now, these computational costs have held back FHE technology from practical use in many large-scale, real-world applications. Breaking through this compute cost barrier is the core research challenge addressed by the proposed research program.
Many different mathematical foundations have been used and are in development to realize FHE at greater computational efficiencies. A common technique to accelerate an FHE scheme is to encrypt multiple bits of data or operands simultaneously into a single polynomial used, or to utilize parallel computational hardware that exploits the inherent mathematical structure found in FHE matrix algebra operations. Both graphic processing units (GPUs) and field-programmable gate arrays (FPGAs) have been used as hardware platforms to accelerate FHE schemes in these ways. Challenges exist for each of these hardware platforms. For example, encrypted data requires significantly more memory storage and bandwidth than plaintext data, to the point where it easily exceeds the capabilities of off-the-shelf FPGAs in high-performance applications. Single-purpose, dedicated, hardware accelerators for FHE as realized by state-of-the-art CMOS system-on-chip (SoC) technologies will provide greatly accelerated performance enabling widespread enterprise-scale applications.
An important application of FHE that has not yet been optimized for hardware-based acceleration is the implementation of kernel logistic regression machine learning models for very large multi-dimensional data sets. Kernel logistic regression is a classification technique which, given a set of inputs, calculates the probability that the input belongs to a certain class as defined by a complex decision surface. This operation is key to many machine learning applications. The goal of this research program is identify scalable, VLSI hardware acceleration architectures and circuits that can reduce the execution time taken to run machine learning inference models on encrypted data by two orders of magnitude, enabling machine learning problems that currently take hours to be solved in minutes. If this is achieved, it would pave the way for widespread implementation of secure, private, cost-effective, cloud-based FHE implementations of machine learning models that guarantee the security and privacy of the data, the models and the inferences generated.
完全同态加密(FHE)是一种加密数据的方法,使用户能够在数据上执行任意操作序列,例如加法或乘法,而无需解密。对加密数据进行计算的能力非常有用,因为它允许在不受信任的基于云的机器上对敏感的个人数据执行服务,而不会损害数据的安全性或隐私性。使用底层的基于格子的数学来执行数学运算需要耗费大量的计算时间和内存。到目前为止,这些计算成本阻碍了FHE技术在许多大规模的实际应用中的实际应用。突破这一计算成本障碍是提出的研究计划所解决的核心研究挑战。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Gulak, Glenn其他文献
A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors
- DOI:
10.1109/tcsi.2014.2380637 - 发表时间:
2015-03-01 - 期刊:
- 影响因子:5.1
- 作者:
Neshatpour, Katayoun;Shabany, Mahdi;Gulak, Glenn - 通讯作者:
Gulak, Glenn
Gulak, Glenn的其他文献
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{{ truncateString('Gulak, Glenn', 18)}}的其他基金
High-Performance Hardware-Accelerated Private Computation
高性能硬件加速私有计算
- 批准号:
RGPIN-2020-05807 - 财政年份:2022
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
High-Performance Hardware-Accelerated Private Computation
高性能硬件加速私有计算
- 批准号:
RGPIN-2020-05807 - 财政年份:2021
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
Algorithms and Architectures for Digital Communications
数字通信算法和架构
- 批准号:
RGPIN-2015-05376 - 财政年份:2019
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
Algorithms and Architectures for Digital Communications
数字通信算法和架构
- 批准号:
RGPIN-2015-05376 - 财政年份:2018
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
Market Assessment for Rapid Bacterial Identification Diagnostic
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531911-2018 - 财政年份:2018
- 资助金额:
$ 3.35万 - 项目类别:
Idea to Innovation
Custom FPGA System for Intelligent Bed Sheet Patient Monitor
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522726-2017 - 财政年份:2017
- 资助金额:
$ 3.35万 - 项目类别:
Engage Grants Program
Algorithms and Architectures for Digital Communications
数字通信算法和架构
- 批准号:
RGPIN-2015-05376 - 财政年份:2017
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
Algorithms and Architectures for Digital Communications
数字通信算法和架构
- 批准号:
RGPIN-2015-05376 - 财政年份:2016
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
Algorithms and Architectures for Digital Communications
数字通信算法和架构
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RGPIN-2015-05376 - 财政年份:2015
- 资助金额:
$ 3.35万 - 项目类别:
Discovery Grants Program - Individual
A Wireless CMOS Device for Rapid Point-of-Care Diagnosis of Bacterial Infections and Antibiotic Susceptibility Profiling
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- 批准号:
462274-2014 - 财政年份:2015
- 资助金额:
$ 3.35万 - 项目类别:
Collaborative Health Research Projects
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