RIA: Design Tools for Reliable Computation in Digital Signal Processing and Control VLSI

Chatterjee这项研究涉及到合成信号处理和控制电路的算法和软件工具的开发，这些电路可以在恶劣条件下执行高度可靠的计算。这是通过使用离线(被动)和在线(主动)方法来实现的。该方法是从电路的高层描述中提取电路行为的数学模型，然后用数值算法对其进行运算。这些反过来又生成了一组在功能上等价的体系结构规范。通过对乘子常数的变换和电路流程图的重构，实现了设计优化。执行优化是为了保持高水平的可测试性和容错性，而不考虑节点活动等成本标准。

Chatterjee This research concerns the development of algorithms and software tools for synthesizing signal processing and control circuits that can perform highly reliable computations under adverse conditions. This is achieved by the use of both off-line (passive) and on-line (active) method. The approach is to extract mathematical models of circuit behavior from high-level descriptions of circuits, and then operate on them with numerical algorithms. These in turn generate a group of architectural specifications that are functionally equivalent. Design optimization is achieved by transformation of the multiplier constants and restructuring of the circuit flow graphs. The optimizations are carried out so as to maintain high levels of testability and fault-tolerance without regard to cost criteria such as node activity.