RIA: Built-In Test Pattern Generation Methods

本研究是关于组合电路测试产生器的设计。 LSFR/SR伪随机测试模式发生器的各种方案正在研究中。 重点是寻找高质量的ATPG算法，需要最小的硬件开销。 几个家庭的不一定原始的，特征多项式正在调查的目的是保证测试模式将被随机应用到所有的输出。 此外，正在研究遵循结构方法的各种部分扫描方案。

This research is on the design of test pattern generators for combinational circuits. Various schemes for LSFR/SR pseudorandom test pattern generators are being examined. The focus is on finding high quality ATPG algorithms that require minimal hardware overhead. Several families of not-necessarily primitive, characteristic polynomials are being investigated with the objective of guaranteeing that test patterns will be applied randomly to all outputs. In addition, various partial scan schemes that follow the structural approach are being studied.