SHF: Small: Exploiting Redundancy for Process-Variation Resilience in Nano-scale Fabrics

该项目解决了与成功实现基于纳米电子学的计算平台相关的关键问题。纳米电子器件所承诺的更高的密度、更低的功率和更快的操作正吸引着越来越多的兴趣。然而，创建纳米级计算结构剩下的两个主要障碍是非常高水平的缺陷和工艺变化。虽然纳米结构的小尺寸及其基于自组装的制造提供了巨大的优势，但它们也使它们非常容易受到缺陷和参数变化的影响-比传统的CMOS更容易受到影响。高缺陷率要求采用分层的容错方法，并且通常涉及在多个系统级别合并精心定位的冗余。除了缺陷之外，制造过程中的微小变化也可能导致关键参数的实际值出现非常大的变化，例如电路延迟。该奖项的目的是开发一种全面的方法，有效地利用纳米芯片中的冗余来改善高缺陷水平和电路延迟变化的影响。将开发的方法将帮助设计者采用一套经过良好测试的方法，以在面对制造缺陷和工艺变化时提供弹性。在教育方面，这个项目将有助于对本科生和研究生进行物理纳米结构艺术、纳米计算机体系结构和未来纳米技术的电路设计方面的培训。

This project addresses critical questions relevant to the successful realization of nanoelectronics based computing platforms. The promised higher density, lower power, and faster operation of nanoelectronics devices is attracting increasing interest. Two of the remaining major roadblocks to the creation of nanoscale computational structures, however, are very high levels of defects and process variations. While the small size of nanostructures and their self-assembly based manufacturing provide great advantages, they also cause them to be very vulnerable to defects and parameter variations---much more so than conventional CMOS. The high defect rates require a layered approach for fault tolerance and typically involve incorporating carefully targeted redundancy at multiple system levels. In addition to defects, even tiny variations in the manufacturing process can lead to very substantial variations in the actual values of key parameters, such as circuit delay. The purpose of this award is to develop a comprehensive methodology to efficiently use redundancy in nanofabrics to ameliorate the effects of both high defect levels and circuit delay variations. The methodology that will be developed will assist designers with a set of well-tested approaches to provide resilience in the face of manufacturing defects and process variations. In educational terms, this project will contribute to the training of undergraduate and graduate students in the art of physical nanofabrics, nanoscale computer architecture, and circuit design for the future nano-technologies.