CIF: Small: Enabling Dynamic Error Cancellation in High-Resolution RF DACs

到2025年，下一代(5G)移动通信系统预计将处理惊人的1000倍的数据流量增长，100倍的用户增长，以及与现有系统相比能耗减少几个数量级。虽然5G通信系统的潜在经济效益是巨大的，但充分实现这些好处将需要克服关键的技术限制，其中大部分与以比现有系统更高的最高频率和更宽的带宽运行有关。集成电路(IC)技术向极高密度和低功耗数字电路的数十年指数级扩展趋势使得强大的数字信号处理(DSP)技术能够在克服这些限制方面发挥重要作用。然而，无论应用多少DSP，要传输的信号最终都是模拟的，因此通常需要通过射频数模转换器(RF DAC)来产生模拟信号。不幸的是，对于下一代通信系统基础设施，如5G基站，具有足够高精度和带宽的RF DAC超出了当今的能力。解决这一问题是该项目的重点，从而帮助实现先进无线网络的全部潜力。该项目将通过开发和实验验证用于射频DAC的新型混合信号校准技术来解决这一问题。虽然以前的校准技术被广泛用于提高许多关键的射频和混合信号通信系统电路模块的性能，例如模数转换器和频率合成器，但到目前为止，它们在改善射频DAC性能方面取得的成功有限。这是因为射频DAC受到静态和动态误差的限制，但现有的校准技术仅解决静态误差。由于动态误差往往随着射频DAC带宽的增加而增加，这是高速通信应用中的一个基本限制。相比之下，在该项目下开发的校准技术可自适应地消除静态和动态误差。将开发三种相关的校准技术，共同消除射频DAC中最重要的误差类型：1)时钟偏差和组件不匹配引起的误差；2)符号间干扰；以及3)信号相关的输出阻抗。这些技术将通过开发两个IC原型进行实验验证，这些原型的目标是射频DAC性能远远超过目前最先进的水平。该项目的主要关注点是理论：开发和优化新的信号处理技术及其严格的数学分析。然而，项目的IC开发部分是至关重要的，因为它将提供反馈来指导理论工作，并将提供评估项目成功的明确手段。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

By 2025, next-generation (5G) mobile communication systems are expected to handle an astonishing 1000-fold increase in data traffic, a 100-fold increase in subscribers, and a several orders of magnitude reduction in energy consumption relative to existing systems. While the potential economic benefits of 5G communication systems are enormous, fully realizing the benefits will require overcoming key technological limitations, most of which relate to operating at far higher maximum frequencies and over far wider bandwidths than existing systems. The multi-decade exponential scaling trend of integrated circuit (IC) technology toward extremely high-density and low-power digital circuitry has enabled powerful digital signal processing (DSP) techniques that will play a large role in overcoming these limitations. Yet no matter how much DSP is applied, the signals to be transmitted are ultimately analog, so analog signal generation, usually via radio frequency digital-to-analog converters (RF DACs), is always required. Unfortunately, RF DACs with high-enough accuracies and bandwidths for next generation communication system infrastructure, such as 5G base stations, are beyond present day capabilities. Solving this problem is the focus of the project, thereby helping realize the full potential of advanced wireless networks.The project will address the problem by developing and experimentally validating a new class of mixed-signal calibration techniques for RF DACs. While prior calibration techniques are widely used to enhance the performance of many critical RF and mixed-signal communication system circuit blocks, such as analog-to-digital converters and frequency synthesizers, they have had limited success to date in improving RF DAC performance. This is because RF DACs are limited by both static and dynamic errors, but prior calibration techniques only address static error. As dynamic error tends to increase with an RF DAC's bandwidth, it presents a fundamental limitation in high-speed communication applications. In contrast, the calibration techniques to be developed under this project adaptively cancel both static and dynamic error. Three related calibration techniques will be developed that together cancel the most significant types of error in RF DACs: those caused by 1) clock skew and component mismatches, 2) inter-symbol interference, and 3) signal-dependent output impedance. The techniques will be validated experimentally via the development of two IC prototypes that target RF DAC performance well beyond the present state-of-the-art. The primary focus of the project is theoretical: the development and optimization of enabling new signal processing techniques and their rigorous mathematical analyses. Nevertheless, the IC development portion of the project is essential in that it will provide feedback to guide the theoretical work and will provide a definitive means of evaluating the project's success.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.