Novel Insulated Gate Structure having Ultrathin Si Quantum Well for Realization of InP-Based Ultra High-Frequency and High-Power Devices

此study is to provide a breakthrough for realization of InP-based ulManagement high-frequency and high-speed设备使用novel insulated gate structure for a "ultrathin Si quantum well"。以下列出的主要结果如下：l ）用于半导体无表面的新型原位表征方法（如井）在接口形成过程中建立了基于基于UHV的无接触C-V方法和光子学表面状态光谱学的新型半导体无表面表征方法（PLS-D13-D1）.2）将这些方法与UHV-STM/STS和XPS分析结合起来，并没有找到一个具有离散深度的点，但要成为一个有缺口状态的区域。本研究旨在支持由我们小组提出的统一失调指示性缺口状态（DIGS）模型，“当前概念的基础”。3）insulated-gate structure（带precisely？lled quantum well thickness was successfully realized by MBE growth of ultrathin psedomorphic Si layer on the InP-based materials and subsequent thinning of the Si layer by ECR plasma-induced partial nitridation.4） Under the optimum ECR nitridation condition， this process realized the InP MIS structure with extremely low interface state density of 2 x10-D110-D1 - 1cm-D1eV-D1。这一价值是迄今为止报告的所有无氧化物InP MIS结构中的最佳值。（5）InP MISFETs制造了目前使用绝缘的闸门结构，具有硅量子光通量良好的闸门控制能力、高效的电子流动性和稳定操作。排水电流的漂移被发现只有1.9%的小到10年D14年D1的操作。

The purpose of this study is to provide a breakthrough for realization of InP-based ultra high-frequency and high-speed devices using a novel insulated gate structure having a "ultrathin Si quantum well". The main results obtained are listed below:l ) Novel in-situ characterization methods for semiconductor free surfaces as well as MIS interfaces during the interface formation process were established based on a UHV-based contactless C-V method and a photoluminescence surface state spectroscopy (PLSィイD13ィエD1).2) By combining these methods with a UHV-STM/STS and a XPS analyses, the pinning center was found not to be a point with discrete deep level, but to be an area with gap state continuum. This seems to support the unified disorder induced gap state (DIGS) model for Fermi level pinning proposed by our group, which is the basis of the concept of present "insulated-gate structure having ultrathin Si quantum well".3) The insulated-gate structure having ultrathin Si quantum well with precisely controlled quantum well thickness was successfully realized by MBE growth of ultrathin psedomorphic Si layer on the InP-based materials and subsequent thinning of the Si layer by ECR plasma-induced partial nitridation.4) Under the optimum ECR nitridation condition, this process realized the InP MIS structure with extremely low interface state density of 2x10ィイD110ィエD1cmィイD1-2ィエD1eVィイD1-1ィエD1. This value is the best of all the oxide-free InP MIS structures reported so far.5) An InP MISFETs fabricated using the present insulated gate structure having the ultrathin Si quantum well exhibited excellent gate control capability, high effective electron mobility and stable operation. The drift of the drain current was found to be as small as 1.9% after 10ィイD14ィエD1 s operation.