Modeling Transport in Nanoscale MOSFETs - Meeting The Challenges of Next-Generation Devices

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The objective of this research is to pursue calculations of channel mobilities and gate oxide tunneling in nanoscale metal-oxide-semiconductor structures with full quantum-mechanical rigor and atomic-scale detail. This research carves new ground in frontier applications of first-principles quantum mechanical calculations. The approach to mobility calculations is based on Density Functional Theory, accurate atomic-scale device structures, and a novel Green's function technique. Tunneling currents through the gate dielectric will be calculated using novel transport methods developed recently for transport through single molecules. The results will be validated against experimental data through collaborations with three experimental groups and will ultimately be cast in forms that will be suitable for incorporation in compact models for circuit modeling so that they can serve in the design of emerging technologies. This research identifies key issues that need to be addressed for modeling transport properties in nanoscale devices that are likely to dominate nanoelectronics in the next decade. Through a collaboration with experimental researchers and engineering device modeling groups, the methods will be validated and integrated into modeling tools for next-generation microelectronics. Device modeling enables the rapid development and introduction of new technologies in the semiconductor industry, benefiting the industry and society through reduced cost and improved performance. This research promotes and relies upon the cross-disciplinary education of graduate and undergraduate students in areas bridging atomic-scale physics and electrical engineering. A local high school physics teacher will be engaged in the research to encapsulate the results in modules suitable for high schools and the general public.