Strukturnahe Modellierung von Nanoscale Multiple-Gate FETs zur Schaltungssimulation

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For the simulation of integrated circuits are so-called compact models used in network simulators. They allow analysis of complex circuits in a reasonable computation time. The demand for numerical efficiency requires a thorough investigation of physical effects which must be taken into account in modeling and which in contrast can be neglected.Through the extension of the project with respect to the original project proposal the objectives for analytical modeling of multiple-gate FETs are complemented by the inclusion of novel device structures such as junction-less MOSFETs.The project focuses on modeling of the following effects:- carrier confinement in multiple-gate MOSFETs- ballistic carrier transport- self-heating effects in SOI structures.Furthermore model equations for intrinsic capacitances will be derived.