SHF: SMALL: Deep Spiking Neural Networks: Algorithms, Architecture, and Devices
SHF: SMALL: Deep Spiking Neural Networks: Algorithms, Architecture, and Devices
批准号:
1618428
负责人:
Kaushik Roy
金额:
$45.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2016
资助国家:
美国
项目状态:
已结题
起止时间:
2016-06-15 至 2021-05-31
中文摘要
本研究试图通过模拟哺乳动物的大脑,探索新的计算模型,通过新的学习方法的类脑尖峰神经网络(SNN)。然而,CMOS器件的特性与大脑中神经元和突触的功能之间的固有失配导致电路复杂性急剧增加。基于自旋电子学(非CMOS)的设备将用于本研究中的硬件设计,这样的类脑架构。普渡大学的nanoHUB(www.nanohub.org)设施将用于传播研究成果,并为研究人员、教育工作者和学生提供神经形态计算的设备到系统模拟框架。PI将开发新的课程模块,包括使用自旋作为计算状态变量的概念。这些将进一步用于更新普渡大学的本科生和研究生课程,并通过nanoHUB提供。具体而言,将利用新的自旋转移扭矩设备的研究来研究模仿具有有效学习能力的尖峰神经元和突触功能的可能性。该研究将由自上而下和自下而上的方法相结合来驱动,该团队将探索与硬件兼容的算法,以实现低功耗的片上学习机制。该研究将开发新的类脑脉冲神经网络学习方法,并使用高效的设备/电路/算法协同设计来实现高能效的脉冲神经网络,用于图像识别和视频分析问题。
英文摘要
This research attempts to explore new computing models by mimicking mammalian brains via new learning methods for brain-like Spiking Neural Networks (SNNs). However, the inherent mismatch between the characteristics of the CMOS devices and the functionality of neuron and synapses in the brain lead to drastic increase in circuit complexity. Spintronics based (non-CMOS) devices will be used in this research for hardware design of such brain-like architectures. The nanoHUB (www.nanohub.org) facility at Purdue University will be used to disseminate research results and to make the devices-to-systems simulation framework for neuromorphic computing available to researchers, educators, and students. The PI will develop new course modules to include the concept of using spin as a state variable for computation. These will be further used to update undergraduate and graduate level courses at Purdue, and made available through the nanoHUB.Specifically, research on new spin-transfer torque devices will be exploited to investigate the possibility of mimicking functions of spiking neurons and synapses with efficient learning capabilities. The research will be driven by a combination of top-down and a bottom-up approach, where the team will explore algorithms that will be hardware compatible for implementing low-power on-chip learning mechanisms. The proposed research will develop new learning methods on brain-like spiking neural networks and use efficient device/circuit/algorithm co-design to achieve highly energy efficient spiking neural networks for image recognition and video analysis problems.
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