Workshop on Devices-to-Systems for In-Memory Computing, being held Virtual at the University of Cincinnati, Cincinnati, Ohio, May 11-12, 2021.

内存计算架构预计将成为使用机器学习和人工智能实施数据驱动算法的推动者，适用于环境监测、医疗保健、物联网、移动设备、通信、无人机和具有巨大社会影响的机器人等应用。目前，一个主要的问题在于了解各种可用器件之间的相对权衡，确定最有希望的半导体器件选项，以及开发新器件以实现最佳功能的内存计算的研究方向。这次NSF研讨会的目的是探索新的设备和工艺，使电路和系统、集成和制造以及半导体劳动力发展能够建立美国的长期领导地位。此次研讨会的意义包括确定未来的纳米级设备，这些设备将提供高性能、低成本、可工程和可扩展的功能，以超低功耗执行内存计算操作。研讨会将举行一场关于教育和劳动力发展的专门会议和小组讨论，其中将包括确定半导体劳动力发展和未来需求方面的挑战，电气工程和计算机科学的跨学科课程发展，有效利用内存设备和支持技术的开源平台，设备需求，以及在这些领域培训未来的科学家。研讨会的调查结果将汇总成一份报告，并张贴在研讨会的网站上，向广大公众传播。此外，这些发现将作为同行评议论文发表在开放获取期刊上，以便向科学界更广泛地传播。这次研讨会的技术意义在于提供一个平台，讨论如何确定能够实现内存计算的下一代纳米级设备。总体目标是探索和确定与内存计算基础相关的科学问题和技术挑战。研讨会将邀请领先的研究人员讨论与当前可用的器件(如静态随机存取存储器(SRAM)器件、动态随机存取存储器(DRAM)器件、闪存器件、磁随机存取存储器(MRAM)器件、自旋扭矩转移随机存取存储器(STTRAM)器件、阻性随机存取存储器(RRAM)器件、相变存储器(PCM)器件、铁电器件和其他记忆器件)相关的挑战，以讨论内存中计算的最有潜力的候选器件。此后，研讨会将主持小组讨论，以确定有前景的器件技术和内存计算的其他方面，例如与互补金属氧化物半导体(CMOSs)生产线前端(FEOL)、生产线后端(BEOL)的兼容性、电路和系统集成，以及半导体制造和封装方面的挑战。演讲者和小组成员将从学术界、半导体行业、联邦研究实验室以及小型和大型商业公司中挑选出来。研讨会将在虚拟平台上组织，包括四个技术会议，一个关于教育和劳动力发展的会议，以及一个关于其他方面的公开讨论，如半导体器件和制造的开放获取平台的作用，以及技术翻译。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

In-memory computing architectures are envisioned to be enablers for implementing data-driven algorithms using Machine Learning and Artificial Intelligence for applications, such as environment monitoring, healthcare, internet of things, mobile devices, communications, drones, and robots having tremendous societal impacts. Currently, a major question lies in understanding relative trade-offs between various available devices, identifying the most promising semiconductor device options, and research directions for developing novel devices for optimum functionality in-memory computing. This NSF workshop is being organized to explore novel devices and processes, enabling circuits and systems, integration and manufacturing, and semiconductor workforce development to establish US long-term leadership. The significance of this workshop includes identifying future nanoscale devices that will offer high-performance, low-cost, engineered and scalable functionality for performing in-memory computing operations at ultra-low power. The workshop will feature a dedicated session and panel discussions on education and workforce development that will include identification of challenges in semiconductor workforce development and future needs, interdisciplinary curriculum development in Electrical Engineering and Computer Science, efficient use of opensource platforms for in-memory devices and supporting technologies, equipment needs, and training of future scientists in these areas. The findings from this workshop will be summarized in a report and posted on workshop website for dissemination to the public at large. Additionally, the findings will be published as a peer-reviewed paper in an open access journal for broader dissemination to the scientific community. The technical significance of this workshop is to provide a platform for discussions on identifying the next generation of nanoscale devices to enable in-memory computing. The overall objective is to explore and identify the scientific issues and technological challenges associated with the underpinnings of in-memory computing. The workshop will invite leading researchers to discuss challenges associated with the currently available devices such as Static Random Access Memory (SRAM) devices, Dynamic Random Access Memory (DRAM) devices, Flash Memory devices, Magnetic Random Access Memory (MRAM) devices, Spin Torque Transfer Random Access Memory (STTRAM) devices, Resistive Random Access Memory (RRAM) devices, Phase Change Memory (PCM) devices, Ferroelectrics-based devices, and other memristive devices to discuss most potential candidates for in-memory computing. Thereafter, the workshop will host panel discussions to identify promising device technologies and other aspects of in-memory computing such as compatibility with Complementary Metal Oxide Semiconductor (CMOS) front end of line (FEOL), back end of line (BEOL), circuits and systems integration, and challenges with semiconductor manufacturing and packaging. The speakers and panelists will be selected from academia, semiconductor industry, federal research laboratories, and small and large business companies. The workshop will be organized on virtual platform and will consist of four technical sessions, one session on education and workforce development, and an open discussion on various other aspects such as role of open access platforms for semiconductor devices and manufacturing, and technology translation.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.