Study on layout design station with custom LSI
Study on layout design station with custom LSI
批准号:
59850058
负责人:
ESASHI Masayoshi
金额:
$3.52万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Developmental Scientific Research
财政年份:
1984
资助国家:
日本
项目状态:
已结题
起止时间:
1984 至 1985
中文摘要
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英文摘要
The layout design station for the efficient design of LSI layout is developed. This system has a special purpose hardware to make neighborhood operations fast and has functions as design rule check etc.. This constructs semiautomatic design station which automates low level operations. This brings out quick responsability to make the most of the intuition of the designer.Following results are obtained in this study.1. Hardware. Two dimentional parallel processing system, which operates on the bit map pattern data with 128 processor elements, is developed. High speed switching network i.e. two dimentional oarrel shifter, which enables efficient two dimentional memory access, is implemented as custom LSIs. Each parts of the system that are for parallel processing, for memory, for display and draw, for address caliculation and for microprogram control respectively are assembled to total system and all performances of this system is certified.2. Software. The microprogram for design rule check etc. are made to operate this system practically. The effectiveness as a layout design station or that for the simulation of cell automatone are also developed and then this presents the ability of this system for general two dimentional parallel processing.
期刊论文(2)
专著(0)
科研奖励(0)
会议论文
電子通信学会技術研究報告. SSD 85-51. (1985)
IEICE 技术研究报告。SSD 85-51。
DOI:
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发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
Institute of Electronics and Communication Engineers of Japan Technical Report. SSD 85-51. (1985)
日本电子通信工程师学会技术报告。
DOI:
--
发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
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依托单位:
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