Study on physical models for understanding the properties of strained-Si MOS Transistors
Study on physical models for understanding the properties of strained-Si MOS Transistors
批准号:
16206029
负责人:
TAKAGI Shinichi
金额:
$30.78万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (A)
财政年份:
2004
资助国家:
日本
项目状态:
已结题
起止时间:
2004 至 2006
中文摘要
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英文摘要
The effects of the channel strain on the electrical characteristics of MOSFETs have not been fully understood yet in spite of the importance. Thus, the establishment of the physical models to describe the electrical properties is of paramount importance. In this study, following issues have been clarified by the analyses using bi-axial tensile strain Si MOSFETs.* It has been found that inversion-layer electron and hole mobility do hold the universality against the effective field with the value of η of 1/2 and 1/3, respectively, as similar with unstrained-Si n-and p-MOSFETs.* It has been found that gate current of n-MOSFETs under the positive bias, attributed to tunneling of electrons from the inversion layers, decreases with an increase in bi-axial tensile strain. We have demonstrated that this tunnel current reduction is quantitatively explained by the increase in the barrier height between Si and SiO2, caused by the lowering of the conduction band edge due to the tensile strain.* It has been found that the density and the energy distribution of interface states, generated by FN stress injection, do not change with applying tensile strain to channels, while the threshold voltage shift of n-MOSFETs after the stressing does change with strain because of the reduction in the band bending under the inversion condition in strained-Si nMOSFETs.* While electron mobility limited by Coulomb scattering due to substrate impurities in Si n-MOSFETs increases with an increase in tensile strain, the electron mobility limited by Coulomb scattering due to interface charges does decrease. These results are explained by the reduction in the averaged conductivity mass and the increase in the scattering probability with interface Coulomb scattering centers, both of which are provided by the increase in the occupancy of the 2-fold valley electrons due to applying tensile strain.
期刊论文(15)
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Performance Enhancement of Partially and Fully Depleted Strained-SOI MOSFETs
部分耗尽和完全耗尽应变 SOI MOSFET 的性能增强
DOI:
--
发表时间:
2006
期刊:
IEEE Trans. Electron Devices Vol.53, Issue. 5
影响因子:
--
作者:
[T. Numata, T. Irisawa, T. Tezuka, J. Koga, N. Hirashita, K. Usuda, E. Toyoda, Y. Miyamura, A. Tanabe, N. Sugiyama and S. Takagi]
通讯作者:
N. Sugiyama and S. Takagi
DOI:
10.1016/j.sse.2007.02.017
发表时间:
2007-04-01
期刊:
SOLID-STATE ELECTRONICS
影响因子:
1.7
作者:
[Takagi, S., Tezuka, T., Sugahara, S.]
通讯作者:
Sugahara, S.
On the Origin of Increase in Substrate Current and Impact lonization Efficiency in Strained Si n-and p-MOSFETs
关于应变 Si n-和 p-MOSFET 中衬底电流增加和影响离子化效率的根源
DOI:
--
发表时间:
2005
期刊:
IEEE Transaction on Eectron Devices Vol.52,Issue.5
影响因子:
--
作者:
[T.Irisawa, T.Numata, N.Sugiyama and S.Takagi]
通讯作者:
N.Sugiyama and S.Takagi
Control of Threshold Voltage and Short Channel Effects in Ultra-thin Strained-SOl CMOS Devices
超薄应变 SOI CMOS 器件中阈值电压和短沟道效应的控制
DOI:
--
发表时间:
2005
期刊:
IEEE Transaction on Eectron Devices Vol.52,Issue.8
影响因子:
--
作者:
[T.Numata, T.Mizuno, T.Tezuka, J.Koga and S.Takagi]
通讯作者:
J.Koga and S.Takagi
Electronic Devices Architectures for the NANO-CMOS Era-From Ultimate CMOS Scaling to Beyond CMOS devices
NANO-CMOS 时代的电子器件架构 - 从终极 CMOS 缩放到超越 CMOS 器件
DOI:
--
发表时间:
2008
期刊:
影响因子:
--
作者:
[S.Takagi, T.Tezuka, T.Irisawa, S.Nakaharai, T.Numata, K.Usuda, N.Sugiyama, M.Shichijo, R.Nakaneand S.Sugahara]
通讯作者:
R.Nakaneand S.Sugahara
共 15 条
Understanding of carrier transport mechanism in Ge MOS interfaces and establishment of mobility enhancement technologies
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Understanding of mechanisms dominating inversion-layer mobility in strained-Si MOSFETs and establishment of guideline for the mobility enhancement
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依托单位:
国内基金
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