Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.
Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.
批准号:
10450136
负责人:
ONODERA Hidetoshi
金额:
$6.98万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B).
财政年份:
1998
资助国家:
日本
项目状态:
已结题
起止时间:
1998 至 2000
中文摘要
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英文摘要
The main goal of this research project is to develop a multimedia communication system including low-power system-LSIs that are developed for real-time low-rate image compression and decompression.This research develops two innovative results as follows.(1) A Low-rate Video Compression Algorithm using Vector-Quantization : FRMSHVQ FRMSHVQ stands for fixed-rate multistage Hierarchical Vector Quantization. It can compress a 10fps. Q-CIF (176×144) video sequence to 29.2kbps. FRMSHVQ uses vector quantization instead of DCT on MPEG which feature enables easy decompression by using a table look-up compared with IDCT operation on MPEG.(2) A Low-power DSP for FRMSHVQ : VP-DSP We have developed and implemented a low-power DSP for the FRMSHVQ algorithm called VP-DSP.VP-DSP stands for a vector-pipeline DSP.The register file of VP-DSP contains several long-bit (160-bit) registers for 16-parallel SIMD operations frequently used on FRMSHVQ.The implemented LSI works properly at 25MHz and 1.6V.The power dissipation is only 49mW for real-time encoding/decoding of a 10fps. QCIF video sequence.
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T.Iwahashi, T.Shibayama, M.Hahsimoto, K.Kobayashi, H.Onodera: "Vector Quantization Processor for Mobile Video Communication."Proc.of 13th IEEE SOC/ASIC Conference. 2000. 75-79 (2000)
T.Iwahashi、T.Shibayama、M.Hahsimoto、K.Kobayashi、H.Onodera:“用于移动视频通信的矢量量化处理器”。第 13 届 IEEE SOC/ASIC 会议的会议记录。
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H.Onodera,K.Kobayashi: "Vector Quantization Processor for Mobile Video Communication."Proc.of 13th IEEE SOC/ASIC Conference 2000. 75-79 (2000)
H.Onodera,K.Kobayashi:“用于移动视频通信的矢量量化处理器。”Proc.of 13th IEEE SOC/ASIC Conference 2000. 75-79 (2000)
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H.Onodera,K.Kobayashi: "Architecture and Performance Evaluation of a New Functional Memory : Functioal Memory for Addition"IEICE Transactions Fundamentals. E83-A(12). 2400-2408 (2000)
H.Onodera、K.Kobayashi:“新功能存储器的架构和性能评估:用于加法的功能存储器”IEICE 交易基础知识。
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H.Onodera,K.Kobayashi: "Architecture and Performance Evaluation of a New Functional Memory : Functional Memory for Addition"IEICE Transactions Fundamentals. E83-A(12). 2400-2408 (2000)
H.Onodera、K.Kobayashi:“新功能存储器的架构和性能评估:加法功能存储器”IEICE Transactions Fundamentals。
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K.Kobayashi: "A Real-Time Low-Rate Video Compression Algorithm Using Multi-Stage Hierachical Vector Quantization"IEICE Trans.on Fundemental. E82-A(2). 215-222 (1999)
K.Kobayashi:“使用多级分层矢量量化的实时低速率视频压缩算法”IEICE Trans.on Fundational。
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共 14 条
LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
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批准号:25280014
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$11.65万
-
财政年份:2013
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负责人:ONODERA Hidetoshi
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依托单位:
Integrated Circuit Design for Robust Operation under Low Supply Voltage
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批准号:22300016
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项目类别:Grant-in-Aid for Scientific Research (B)
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财政年份:2010
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负责人:ONODERA Hidetoshi
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依托单位:
Variation and Defect Aware Design of Integrated Circuits
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批准号:19300010
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$12.23万
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财政年份:2007
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负责人:ONODERA Hidetoshi
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依托单位:
Research of a High-speed Signal Transmission Scheme for Integrated Circuits
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批准号:14350186
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$10.88万
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财政年份:2002
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负责人:ONODERA Hidetoshi
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依托单位:
Development of Statistical Performance Analysis and Optimization Methods for Large Scale Integrated Circuits
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批准号:11555095
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项目类别:Grant-in-Aid for Scientific Research (B)
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资助金额:$7.42万
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财政年份:1999
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负责人:ONODERA Hidetoshi
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依托单位:
Optimization of detailed design for UDSM (ultra deep submicron) integrated circuits
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批准号:09650383
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.43万
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财政年份:1997
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负责人:ONODERA Hidetoshi
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依托单位:
Statistical modeling method for scaled MOSFET
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批准号:08555085
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项目类别:Grant-in-Aid for Scientific Research (A)
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资助金额:$4.8万
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财政年份:1996
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负责人:ONODERA Hidetoshi
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依托单位:
Development of Comprehensive Set of LSI CAD Benchmarks
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批准号:06558041
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$4.61万
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财政年份:1994
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负责人:ONODERA Hidetoshi
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依托单位:
Simultaneous Circuit and Layout Design Method for Analog LSIs under Performance Constraints
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批准号:06680317
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.41万
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财政年份:1994
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负责人:ONODERA Hidetoshi
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依托单位:
海外基金