Integrated Circuit Design for Robust Operation under Low Supply Voltage

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We have investigated on a design method that achieves robust circuit operation under low supply voltage of around 0.7 V. In particular, we have worked onthree topics:(1) built-in self monitor and compensation of die-to-die variation(2) sequential logic gates tolerating for within-die variation(3) evaluation of dynamic performance variation under low supply voltage.We have successfully developed variation-tolerant D-FFs, all-digital monitors and body-bias generator circuits for performance compensation, and accurate evaluation of delay fluctuation due to Random Telegraph Noise.