LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
批准号:
25280014
负责人:
ONODERA Hidetoshi
金额:
$11.65万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (B)
财政年份:
2013
资助国家:
日本
项目状态:
已结题
起止时间:
2013-04-01 至 2017-03-31
中文摘要
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英文摘要
期刊论文(27)
专著(0)
科研奖励(0)
会议论文
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On-Chip Detection of Process Shift and Process Spread for Post-Silicon Diagnosis and Model-Hardware Correlation
工艺偏移和工艺扩展的片上检测,用于硅后诊断和模型硬件关联
DOI:
10.1587/transinf.e96.d.1971
发表时间:
2013
期刊:
IEICE Transactions on Information and Systems
影响因子:
0.7
作者:
[A.K.M. Mahfuzul Islam, and Hidetoshi Onodera]
通讯作者:
and Hidetoshi Onodera
Characterization and compensation of performance variability using on-chip monitors
使用片上监视器表征和补偿性能变化
DOI:
--
发表时间:
2014
期刊:
影响因子:
--
作者:
[A.K.M. Mahfuzul Islam, and Hidetoshi Onodera]
通讯作者:
and Hidetoshi Onodera
Computer Simulation of Radiation-Induced Clock-Perturbation in Phase-Locked Loop with Analog Behavioral Model
用模拟行为模型对锁相环中辐射引起的时钟扰动进行计算机仿真
DOI:
--
发表时间:
2014
期刊:
影响因子:
--
作者:
[Tomohiro Fujita, SinNyoung Kim, and Hidetoshi Onodera]
通讯作者:
and Hidetoshi Onodera
Dependable VLSI Platform with Variability and Soft-Error Resilience
具有可变性和软错误恢复能力的可靠 VLSI 平台
DOI:
--
发表时间:
2015
期刊:
影响因子:
--
作者:
[Ryo Emoto, Atsushi Kawaguchi, Hisako Yoshida, Shigeyuki Matsui, Hidetoshi Onodera]
通讯作者:
Hidetoshi Onodera
Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation
标准单元结构,具有灵活的 P/N 阱边界,可实现近阈值电压操作
DOI:
10.1587/transfun.e96.a.2499
发表时间:
2013
期刊:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
影响因子:
--
作者:
[Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera]
通讯作者:
Hidetoshi Onodera
共 27 条
Integrated Circuit Design for Robust Operation under Low Supply Voltage
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批准号:22300016
-
项目类别:Grant-in-Aid for Scientific Research (B)
-
资助金额:$11.81万
-
财政年份:2010
-
负责人:ONODERA Hidetoshi
-
依托单位:
Variation and Defect Aware Design of Integrated Circuits
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批准号:19300010
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项目类别:Grant-in-Aid for Scientific Research (B)
-
资助金额:$12.23万
-
财政年份:2007
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负责人:ONODERA Hidetoshi
-
依托单位:
Research of a High-speed Signal Transmission Scheme for Integrated Circuits
-
批准号:14350186
-
项目类别:Grant-in-Aid for Scientific Research (B)
-
资助金额:$10.88万
-
财政年份:2002
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负责人:ONODERA Hidetoshi
-
依托单位:
Development of Statistical Performance Analysis and Optimization Methods for Large Scale Integrated Circuits
-
批准号:11555095
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项目类别:Grant-in-Aid for Scientific Research (B)
-
资助金额:$7.42万
-
财政年份:1999
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负责人:ONODERA Hidetoshi
-
依托单位:
Development of a Functional LSI Achieving Low-rate Multimedia Data Transmission.
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批准号:10450136
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项目类别:Grant-in-Aid for Scientific Research (B).
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资助金额:$6.98万
-
财政年份:1998
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负责人:ONODERA Hidetoshi
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依托单位:
Optimization of detailed design for UDSM (ultra deep submicron) integrated circuits
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批准号:09650383
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.43万
-
财政年份:1997
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负责人:ONODERA Hidetoshi
-
依托单位:
Statistical modeling method for scaled MOSFET
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批准号:08555085
-
项目类别:Grant-in-Aid for Scientific Research (A)
-
资助金额:$4.8万
-
财政年份:1996
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负责人:ONODERA Hidetoshi
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依托单位:
Development of Comprehensive Set of LSI CAD Benchmarks
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批准号:06558041
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项目类别:Grant-in-Aid for Developmental Scientific Research (B)
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资助金额:$4.61万
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财政年份:1994
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负责人:ONODERA Hidetoshi
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依托单位:
Simultaneous Circuit and Layout Design Method for Analog LSIs under Performance Constraints
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批准号:06680317
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项目类别:Grant-in-Aid for General Scientific Research (C)
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资助金额:$1.41万
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财政年份:1994
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负责人:ONODERA Hidetoshi
-
依托单位:
海外基金